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Conall Fee, Derby GB

Patent application numberDescriptionPublished
20110090514APPARATUS AND A METHOD OF MEASURING EROSION OF AN EDGE OF A TURBOMACHINE AEROFOIL - An apparatus for measuring erosion of an edge of an aerofoil portion of a fan blade includes a laser source to direct light at a position on the edge of the fan blade. A detector detects light reflected from the position on the edge of the fan blade. A computer measures the distance from the laser source to points on the edge of the fan blade to produce a profile of the edge in terms of x and z coordinates. The computer calculates the distances of points on the edge of the fan blade from a centroid of the profile. The computer detects peaks in the distance of points from the centroid of the profile. The computer selects two peaks with the greatest distance therebetween. The computer determines the distance between the two peaks and compares the determined distance and a predetermined distance to determine if there is unacceptable erosion.04-21-2011

Gregory James Fee, Burnaby CA

Patent application numberDescriptionPublished
20120107779Object-field-based mathematics system - An apparatus includes a processor, a computer memory, a user interface, and computer-executable instructions which enable a user to formulate mathematical expressions via the user interface. The mathematical expression is composed from objects selected from a library of object types in the memory. The object types include primitive objects and non-primitive objects. Non-primitive objects contain at least one field which in turn can contain additional objects; primitive objects have no fields. The mathematical expression is defined by a computer-readable data structure in the memory, and each object and field has a mathematical significance assigned thereto. The data structure uniquely identifies each object and each field, and includes pointers to define nesting of the objects and fields in the mathematical expression. The computer-executable instructions include steps to identify user inputs with at least some of the objects, and to display the mathematical expression represented by the data structure via the display.05-03-2012

Michael Fee, Lower Hutt NZ

Patent application numberDescriptionPublished
20080210454Composite Superconductor Cable Produced by Transposing Planar Subconductors - A method of forming a low AC loss, fully transposed cabled superconductor from multiple superconducting subconductors cut in a serpentine form from a wider superconducting tape is disclosed. By assembling pre-cut subconductor tapes a cable with a short transposition pitch length can be formed without excessive in-plane or out-of-plane deformation of the tape which could otherwise cause degradation of its superconducting performance. The transposition may be in either Roebel bar or Rutherford cable geometry.09-04-2008

Setho Sing Fee, Singapore SG

Patent application numberDescriptionPublished
20080284000Integrated Circuit Packages, Methods of Forming Integrated Circuit Packages, And Methods of Assembling Integrated Circuit Packages - Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.11-20-2008
20100151630Methods of Forming Integrated Circuit Packages, and Methods of Assembling Integrated Circuit Packages - Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.06-17-2010
20100224989MICROELECTRONIC DEVICES HAVING INTERMEDIATE CONTACTS FOR CONNECTION TO INTERPOSER SUBSTRATES, AND ASSOCIATED METHODS OF PACKAGING MICROELECTRONIC DEVICES WITH INTERMEDIATE CONTACTS - Microelectronic devices having intermediate contacts, and associated methods of packaging microelectronic devices with intermediate contacts, are disclosed herein. A packaged microelectronic device configured in accordance with one embodiment of the invention includes a microelectronic die attached to an interconnecting substrate. The microelectronic die includes an integrated circuit electrically coupled to a plurality of terminals. Each of the terminals is electrically coupled to a corresponding first contact on the die with an individual wire-bond. Each of the first contacts on the die is electrically coupled to a corresponding second contact on the interconnecting substrate by a conductive coupler such as a solder ball.09-09-2010
20110233745Integrated Circuit Packages - Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.09-29-2011

Patent applications by Setho Sing Fee, Singapore SG