Patent application number | Description | Published |
20110090100 | TRANSFORMING SIGNALS USING PASSIVE CIRCUITS - Passive signal combiners are employed to transform at least one signal from one domain to another. In some aspects the transformation comprises an NFL an IFFT, a DFT, or an IDFT. In some implementations the passive signal combiners comprise a set of planar waveguides (e.g., which may be referred to as beamformers or Rotman lenses) that have multiple inputs and outputs and are configured to provide orthogonal output signals. In some implementations an electrical signal (e.g., received via an antenna element) is coupled to passive beamformers that transform the electrical signal from one domain to another domain. Here, a transformation of the electrical signal by a given passive beamformer may have a first resolution, and outputs from the passive beamformers may correspond to orthogonal groups. A combiner circuit may be used to combine the outputs from the passive beamformers and produce a combined output having a second resolution and an associated error. In some aspects, this error may be less than a cumulative error associated with the passive beamformers if a single passive beamformer was instead employed to transform the electrical signal at the second resolution. Also, by using at least partially different bandwidths for components in the circuits, a higher effective bandwidth for the transformation may be achieved. | 04-21-2011 |
20110228864 | RESONANCE MITIGATION FOR HIGH-SPEED SIGNALING - The frequency response of a first component signal path of a differential signaling link is adjusted to off-set a notch in the frequency response from a corresponding notch in the frequency response of a second component signal path of the differential signaling link. | 09-22-2011 |
20120187988 | Signal Distribution Networks and Related Methods - A signal distribution network has segments that each have a buffer circuit, a transmission line coupled to the buffer circuit, an inductor coupled to the buffer circuit through the transmission line, and a variable capacitance circuit coupled to the inductor and coupled to the buffer circuit through the transmission line. A capacitance of the variable capacitance circuit is set to determine a phase and an amplitude of a signal transmitted through the transmission line. A signal distribution network can include a phase detector, a loop filter circuit, and a resonant delay circuit. The phase detector compares a phase of a first periodic signal to a phase of a second periodic signal. The resonant delay circuit has a variable impedance circuit having an impedance that varies based on changes in an output signal of the loop filter circuit. | 07-26-2012 |
20120218001 | Techniques for Phase Detection - A phase detection circuit can include two phase detectors that each generate a non-zero output in response to input signals being aligned in phase. The input signals are based on two periodic signals. The phase detection circuit subtracts the output signal of one phase detector from the output signal of the other phase detector to generate a signal having a zero value when the periodic signals are in phase. Alternatively, a phase detector generates a phase comparison signal indicative of a phase difference between periodic signals. The phase comparison signal has a non-zero value in response to input signals to the phase detector being aligned in phase. The input signals are based on the periodic signals. An output circuit receives the phase comparison signal and generates an output having a zero value in response to the periodic signals being aligned in phase. | 08-30-2012 |
20120289338 | DIRECTIONAL BEAM STEERING SYSTEM AND METHOD TO DETECT LOCATION AND MOTION - A gaming system is disclosed comprising a console unit having a processor and transceiver circuitry. The transceiver circuitry couples to the processor and includes respective receiver and transmitter circuits. A first phased array antenna interface is employed to transmit and receive directional signals in response to the processor. The system employs a mobile game controller including a second phased array antenna interface to receive and redirect the directional signals back to the first phased array antenna interface. The processor generates proximity data based at least in part on a parameter associated with the directional signals, the proximity data representing the proximity of the mobile game controller with respect to the game console unit. | 11-15-2012 |
20120306538 | Phase Detection Circuits and Methods - A phase detector circuit compares the phases of first and second periodic input signals to generate an output signal. The phase detector includes a circuit that makes two different combinations of the first and the second periodic input signals to generate third and fourth periodic signals. This circuit causes the third periodic signal to be based on a first combination of the first periodic signal and the second periodic signal that imparts a first relative phase shift. The circuit causes the fourth periodic signal to be based on a second combination of the first periodic signal and the second periodic signal to provide a different relative phase shift. The phase detector also includes a comparison circuit that compares a measure of the power of the third periodic signal to a measure of the power of the fourth periodic signal to generate the phase comparison output signal. | 12-06-2012 |
20130101005 | Methods and Systems for Near-Field MIMO Communications - A near-field communication (NFC) system supports increased data rates using a multiple-input-multiple-output (MIMO) interface. Multiple receive antennas are positioned within the near field of multiple transmit antennas. The NFC system uses a combination of antenna spacing and polarizations to reduce correlation between channels, and thus improves performance by creating closer to ideal MIMO operation. Such system can also be operated as parallel SISO links with reduced cross-channel interference resulting in low power consumption. | 04-25-2013 |
20130135015 | INTEGRATED CIRCUIT COMPRISING FRACTIONAL CLOCK MULTIPLICATION CIRCUITRY - Circuitry capable of performing fractional clock multiplication by using an injection-locked oscillator is described. Some embodiments described herein perform fractional clock multiplication by periodically changing the injection location, from a set of injection locations, where the injection signal is injected and/or by periodically changing a phase, from a set of phases, of the injection signal that is injected into the ILO. | 05-30-2013 |
20130241772 | INTEGRATED PHASE-SHIFTING-AND-COMBINING CIRCUITRY TO SUPPORT MULTIPLE ANTENNAS - The disclosed embodiments generally relate to techniques for processing signals received from multiple antennas. More specifically, the disclosed embodiments relate to a system that uses an integrated phase-shifting-and-combining circuit to process signals received from multiple antenna elements. This circuit applies a specified phase shift to the input signals, and combines the phase-shifted input signals to produce an output signal. In some embodiments, the integrated phase-shifting-and-combining circuit uses a current-steering mechanism to perform the phase-shifting-and-combining operations. This current-steering mechanism operates by converting the input signals into associated currents, and then steering each of the associated currents through multiple pathways which have different delays. Next, the currents from the multiple pathways for the associated currents are combined to produce the output signal. During this process, while steering each of the associated currents through multiple pathways to achieve different phase shifts, complementary impedance changes through the multiple pathways cause the aggregate impedance at the output to remain substantially constant. | 09-19-2013 |
20130336082 | AREA AND POWER EFFICIENT CLOCK GENERATION - Die-to-die interconnect structures are leveraged to form the inductive component of an LC oscillator, thus yielding an LC tank distributed across multiple IC dies rather than lumped in a single die. By this arrangement, reliance on area/power-consuming on-chip inductors may be reduced or eliminated, and phase-aligned clocks may be extracted from the LC tank within each of the spanned IC dies, obviating multiple oscillator instances or complex phase alignment circuitry. | 12-19-2013 |
20140159961 | LOW-COST TRACKING SYSTEM - A method of tracking a second electronic device with respect to a first electronic device is disclosed. The method includes transmitting a first waveform of a first frequency along a first fixed path associated with the first device. A second waveform having a frequency based on the first frequency is wirelessly transmitted from the first device to the second device along a first wireless path. The second waveform is wirelessly transmitted from the second device to the first device along a second wireless path. The first and second waveforms are received at the phase comparator circuit. A first phase relationship of the received first waveform is then compared to a second phase relationship of the received re-transmitted waveform. A coordinate of the second device is determined with respect to a reference coordinate based on the comparing. | 06-12-2014 |
20140176365 | HIGH-ACCURACY AND LOW-POWER TRACKING SYSTEM FOR MOBILE DEVICES - An electronic device for wirelessly tracking the position of a second electronic device is disclosed. The electronic device includes transceiver circuitry having a beacon generator to generate a beacon at a particular frequency and direction. An antenna array transmits the beacon, and receives at least one reflected beacon from the second electronic device. The reflected beacon is received if a position of the second electronic device lies within a range of directions of the beacon. The transceiver circuitry further includes an injection-locked oscillator having an input coupled to the antenna array to receive reflected beacons, and to lock to the reflected beacon when the reflected beacon has a frequency value within locking range of the oscillator. Processing circuitry coupled to the transceiver circuitry tracks the position of the second device based on the lock condition of the oscillator. | 06-26-2014 |
20140210683 | CALIBRATING A RETRO-DIRECTIVE ARRAY FOR AN ASYMMETRIC WIRELESS LINK - The disclosed embodiments relate to a technique for calibrating a retro-directive array. During the calibration process, the system measures a gain g | 07-31-2014 |
20140323054 | COLLABORATIVE CHANNEL SOUNDING IN MULTI-ANTENNA SYSTEMS - The disclosed embodiments relate to a system that performs channel-sounding operations in a multi-antenna wireless communication system. During operation, the system first performs channel-sounding operations between a first client and a second client in a first frequency band. These channel-sounding operations involve transmitting a series of known tones between the first client and the second client and using signals received as a result of the transmissions to finds a strongest path between the first client and the second client. Next, the system uses the identified strongest path to improve channel-sounding operations in a second frequency band. | 10-30-2014 |
20140333356 | Signal Distribution Networks and Related Methods - A signal distribution network has segments that each have a buffer circuit, a transmission line coupled to the buffer circuit, an inductor coupled to the buffer circuit through the transmission line, and a variable capacitance circuit coupled to the inductor and coupled to the buffer circuit through the transmission line. A capacitance of the variable capacitance circuit is set to determine a phase and an amplitude of a signal transmitted through the transmission line. A signal distribution network can include a phase detector, a loop filter circuit, and a resonant delay circuit. The phase detector compares a phase of a first periodic signal to a phase of a second periodic signal. The resonant delay circuit has a variable impedance circuit having an impedance that varies based on changes in an output signal of the loop filter circuit. | 11-13-2014 |
20140380082 | INTEGRATED CIRCUIT COMPRISING FRACTIONAL CLOCK MULTIPLICATION CIRCUITRY - Circuitry capable of performing fractional clock multiplication by using an injection-locked oscillator is described. Some embodiments described herein perform fractional clock multiplication by periodically changing the injection location, from a set of injection locations, where the injection signal is injected and/or by periodically changing a phase, from a set of phases, of the injection signal that is injected into the ILO. | 12-25-2014 |