| Patent application number | Description | Published |
|---|
| 20090064453 | Retractable eraser with bristles - A retractable eraser has an elongated contoured housing which has a longitudinal slot and spaced detents and an opening at one end. A carrier has a button which is depressible so that a catch clears the detents to permit selective longitudinal displacement of the carrier. An oval shaped eraser element is mounted to the carrier and displaced into and out of the housing so as, in one position, to project beyond the housing. Bristles project longitudinally from the housing around the opening. | 03-12-2009 |
| 20090064509 | Manually operated hole punch - A manually operated single hole punch employs a pair of pivoted members having squeezable handles. A pair of opposed jaws have canopies formed from transparent or semi-transparent material to facilitate alignment of the punch with the material to be punched and to observe a reservoir which receives punched remnants. | 03-12-2009 |
| 20090064526 | Tape measure - A tape measure employs a generally rounded housing which receives a retractable measuring tape that is coilable within the housing and biased towards the fully coiled position. An actuator button is depressable to fix the measuring tape at a selected extended position. A clip assembly is removably attachable to the tape measure for facilitating mounting the tape measure to a belt. The end of the tape measure includes a stop member that may be configured as a hook portion defining a nail catch. The hook portion also has a rubber overmold to prevent slippage. | 03-12-2009 |
| 20090067912 | Pencil sharpener with eraser - A pencil sharpener case has a rotatable cover which covers a mechanical pencil sharpener. In one position, the cover may be rotatably retracted to provide access to the pencil sharpener. The case also mounts an eraser which may be used when the pencil sharpener is covered. | 03-12-2009 |
| 20100212781 | Pencil sharpener - A pencil sharpener has an electrical motor which drives a sharpening assembly. The end of the pencil to be sharpened is inserted downwardly into an opening in the top surface. Shavings from the sharpening process are deposited in a drawer-like receptacle below the sharpening assembly. A switch is provided so that the sharpening assembly will not be activated when the receptacle drawer is removed for disposal of the shavings. | 08-26-2010 |
| Patent application number | Description | Published |
|---|
| 20080212303 | DEVICE FOR REDUCING OR PREVENTING EXCHANGE OF INFORMATION - A device that is adapted to receive a card including information, such as confidential information, in machine-readable form is disclosed. The device includes a body, wherein at least a portion of the body is made of a material that is adapted to attenuate or disrupt an interrogating signal sent toward the card or a return signal sent from the card to thereby at least reduce the likelihood that the confidential information is read from the card. | 09-04-2008 |
| 20090026566 | Semiconductor device having backside redistribution layers and method for fabricating the same - Present embodiments relate to a semiconductor device having a backside redistribution layer and a method for forming such a layer. Specifically, one embodiment includes providing a substrate comprising a via formed therein. The substrate has a front side and a backside. The embodiment may further include forming a trench on the backside of the substrate, disposing an insulating material in the trench, and forming a trace over the insulating material in the trench. | 01-29-2009 |
| 20090032964 | System and method for providing semiconductor device features using a protective layer - Present embodiments relate to systems and methods for providing semiconductor device features using a protective layer during coating operations. One embodiment includes a method comprising providing a substrate with a hole formed partially therethrough, the hole comprising an opening in a first side of the substrate. Additionally, the method comprises disposing a protective layer over the first side of the substrate, removing a portion of the protective layer over at least a portion of the opening to provide access to the hole, and filling at least a portion of the hole with a fill material. | 02-05-2009 |
| 20090174018 | CONSTRUCTION METHODS FOR BACKSIDE ILLUMINATED IMAGE SENSORS - A method of constructing a backside illuminated image sensor is described. The method includes the steps of forming a semiconductor wafer, forming at least electrical contacts in the semiconductor wafer, forming, in a handle wafer separate from the semiconductor wafer, a plurality of via holes, attaching the semiconductor wafer to the handle wafer such that the via holes in the handle wafer are aligned with the respective electrical contacts on the semiconductor wafer, removing the substrate layer from the semiconductor wafer, removing at least a portion of the handle wafer to expose the plurality of via holes, filling each of the exposed via holes with a conductive material and applying a solder material to each of the exposed via holes such that the conductive material in each of the via holes is electrically connected to the solder material. | 07-09-2009 |
| 20100171217 | THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS - A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths. | 07-08-2010 |
| 20100273288 | IMAGER DEVICE WITH ELECTRIC CONNECTIONS TO ELECTRICAL DEVICE - An imager device is disclosed including a first substrate having an array of photosensitive elements formed thereon, a first conductive layer formed above the first substrate, a first conductive member extending through the first substrate, the first conductive member being conductively coupled to the first conductive layer, a standoff structure formed above the first substrate, a second conductive layer formed above the standoff structure, the second conductive layer being conductively coupled to the first conductive layer, and an electrically powered device positioned above the standoff structure, the electrically powered device being electrically coupled to the second conductive layer. A method of making an imager device is disclosed including providing a first substrate having a first conductive layer and an array of photosensitive elements formed above the first substrate, forming a conductive member that extends through the first substrate and is conductively coupled to the first conductive layer, forming a standoff structure above the first substrate, forming a patterned conductive layer above the standoff structure, the patterned conductive layer being conductively coupled to the first conductive layer, and conductively coupling an electrically powered device to the patterned conductive layer positioned above the standoff structure. | 10-28-2010 |
| 20110169122 | SEMICONDUCTOR DEVICE HAVING BACKSIDE REDISTRIBUTION LAYERS AND METHOD FOR FABRICATING THE SAME - Present embodiments relate to a semiconductor device having a backside redistribution layer and a method for forming such a layer. Specifically, one embodiment includes providing a substrate comprising a via formed therein. The substrate has a front side and a backside. The embodiment may further include forming a trench on the backside of the substrate, disposing an insulating material in the trench, and forming a trace over the insulating material in the trench. | 07-14-2011 |
| 20110233777 | THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS - A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths. | 09-29-2011 |
