Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Falconeri
Giuseppe Falconeri, Sant'Agata Li Battiati (catania) IT
| Patent application number | Description | Published |
|---|---|---|
| 20110022745 | INTERFACING DEVICE AND METHOD, FOR EXAMPLE FOR SYSTEMS-ON-CHIP - An interface device, such as for a System-on-Chip (SoC) bus, transfers data from an input queue through an output to a target. The interface device includes a buffer network for buffering input data when the target is not available for receiving the data. A multiplexer switches between a first operating condition for directing to the target the data from the input queue, and a second operating condition for directing to the target the buffered data from the buffer network. A finite-state machine selectively switches the multiplexer between the first operating condition and the second operating condition based on an acknowledgement signal received from the target. This indicates the availability of the target for receiving the data. | 01-27-2011 |
Giuseppe Falconeri, Sant' Agata Li Battiati (catania) IT
| Patent application number | Description | Published |
|---|---|---|
| 20100080229 | METHOD OF EXCHANGING INFORMATION IN A COMMUNICATION NETWORK, CORRESPONDING COMMUNICATION NETWORK AND COMPUTER PROGRAM PRODUCT - A method of performing transactions in a communication network in which is exchanged between Intellectual Property (IP) cores has information transported in packets which include a header for transporting control information and one or more payloads transporting content. A versatile packet format is used which is adapted to transport different traffic patterns generated by the IP cores using different protocols for simple interoperability between the IP cores and also providing configurability of the granularity arbitration process to correct crossing the routers in the communication network. | 04-01-2010 |
| 20100281144 | CONTROL DEVICE FOR A SYSTEM-ON-CHIP AND CORRESPONDING METHOD - A system such as a “System-on-Chip” includes an interconnection network, a set of initiator modules for transmitting data towards the interconnection network and at least one communication arbiter for deciding, as a function of a set of configuration values, which transmissions of the initiator modules have access to the interconnection network. At least one configuration value is associated with each initiator module. A control device coupled to at least one of the initiator modules detects a communication status associated with the transmissions of the coupled initiator and generates a communication status signal whose value is representative of such status, determines a filtered value representative of a series of the values of the communication status signal, and selectively varies one of the configuration values as a function of the filtered value. | 11-04-2010 |
Giuseppe Falconeri, Agrate Brianza ( Milano) IT
| Patent application number | Description | Published |
|---|---|---|
| 20110149735 | ON-CHIP INTERCONNECT METHOD, SYSTEM AND CORRESPONDING COMPUTER PROGRAM PRODUCT - In a method for making an on-chip interconnect for conveying between a set of initiators and a set of targets in which traffic is organized in classes of service, priority values representing the classes of service are associated with the traffic. The method further includes propagating the priority values towards the points of the network where an arbitration is performed between two classes of service of the traffic, and providing arbitration as a function of the priority values. | 06-23-2011 |