| Patent application number | Description | Published |
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| 20090055681 | INTRA-DISK CODING SCHEME FOR DATA-STORAGE SYSTEMS - Exemplary embodiments of the present invention comprise a method for the use of an intra-disk redundancy storage protection operation for the scrubbing of a disk. The method comprises initiating a disk scrubbing operation upon each disk of a plurality of disks that are comprised within a storage disk array, issuing a disk scrubbing command for a predetermined segment of the disks that are comprised within the storage disk array at a predetermined time interval, and identifying an unrecoverable segment on a disk. The method further comprises determining if unrecoverable sectors comprised within the unrecoverable segment can be reconstructed, and reconstructing the unrecoverable sectors of the unrecoverable segment and relocating the segment to a spare storage location on the disk in the event that the segment cannot be reconstructed within its original storage location. | 02-26-2009 |
| 20090080107 | METHOD OF CONTROLLING MOVEMENTS OF A POSITION OF A MICROSCANNER - The invention relates to a method of controlling movements of a positioner of a micro-scanner, the method comprising: determining the vibration resonance frequency ranges of the positioner, and performing a main scan by a controlled movement of the positioner. | 03-26-2009 |
| 20090174964 | SERVO CHANNEL FOR TAPE DRIVE SYSTEMS - Provided are techniques for synchronous servo channel for a data tape drive. A servo reader is configured to read servo bursts from a data tape. An anti-aliasing filter is operable to output a bandlimited signal and is coupled to receive a servo channel signal comprising servo bursts from the servo reader. An analog-to-digital converter (ADC) is operable to output signal samples and is coupled to receive the bandlimited signal from the anti-aliasing filter. An interpolation and control unit is operable to output interpolated signal samples and control signals, has a first input coupled to receive the signal samples from the ADC, and has a second input coupled to receive the correlation signal samples from the dibit correlator. A dibit correlator is operable to output correlation signal samples and is coupled to receive the interpolated signal samples and control signals from the interpolation and control unit. | 07-09-2009 |
| 20090237832 | ERROR CORRECTION CODING OF LONGITUDINAL POSITION INFORMATION - A sequential data storage medium, comprising a sequence of plurality of servo patterns that provide lateral position information and longitudinal position information, wherein each of the plurality of servo patterns comprises a first burst comprising a first plurality of pulses, a second burst comprising a second plurality of pulses, a third burst comprising a third plurality of pulses, and a fourth burst comprising a fourth plurality of pulses. The spacings between the first plurality of pulses, in combination with the spacings between the second plurality of pulses, encode a first bit without affecting the recovery of lateral position information. The spacings between the third plurality of pulses, in combination with the spacings between the fourth plurality of pulses, encode a second bit without affecting the recovery of lateral position information. The sequence of plurality of servo patterns comprises a sequence of the first bits and a sequence of the second bits to form an error-correction codeword providing error-correction capability. | 09-24-2009 |
| 20090279201 | JOINT SPECIFICATION OF SERVO FORMAT AND SERVO READER PARAMETERS FOR TAPE DRIVE SYSTEMS - A servo pattern, including stripes arranged in servo bursts for use in position error signal (PES) generation, is provided in which a stripe width is narrower than 1.7 μm and in which the stripes are oriented at an azimuth angle which in absolute value is equal to or larger than 6 degrees. | 11-12-2009 |
| 20090279202 | HEAD DESIGN FOR WRITING SERVO PATTERNS ON MAGNETIC TAPE - A servo write head is provided and is configured to simultaneously write at least two servo patterns in respective servo bands on linear magnetic tape. Centerlines of the servo patterns are substantially uniformly spaced in the lateral direction. In addition, the servo patterns of all adjacent respective servo bands are displaced relative to each other in a longitudinal direction by an amount that is related to a length of a servo frame and a type of the servo patterns. | 11-12-2009 |
| 20100001772 | METHODS AND SYSTEMS FOR DELAY COMPENSATION IN GLOBAL PLL-BASED TIMING RECOVERY LOOPS - A system in one embodiment includes a global PLL circuit comprising multiple inputs, each input being for receiving an error signal associated with an individual channel; and a delay compensation circuit coupled to the global PLL circuit. A method in one embodiment includes receiving multiple error signals, each error signal being associated with an individual channel; applying one or more delay compensation signals to the error signals; and outputting phase error output signals for each of the channels. | 01-07-2010 |
| 20100214688 | DUAL ACTUATOR FOR A READ-WRITE DATA STORAGE DEVICE - A data storage device includes a first head module independently moveably mounted relative to the storage device. The first head module includes at least one of a read element and a write element. In addition, the data storage device includes a second head module independently moveably mounted relative to the storage device. The second head module includes at least one of a read element and a write element operatively associated with the at least one of a read element and write element of the first head module. The second head module is selectively shiftable relative to the first head module in order to align the at least one of the read element and the write element of the first head module and the at least one of the read element and the write element of the second head module to one another. | 08-26-2010 |
| 20100214690 | ROLLER GUIDE FOR MAGNETIC TAPE WITH MULTIPLE GUIDING SECTIONS - A device for guiding a magnetic tape in a data storage drive including a cylindrical body rotatable about a longitudinal axis. The cylindrical body having opposing ends and defining a surface area for mating with a magnetic tape. A curved section at opposite ends of the cylindrical body is contiguous with the surface area of the cylindrical body. A plurality of vents in the cylindrical body allow air flow therethrough between the surface area and the tape. The amount of air flow between the cylindrical body and the tape produces varying frictional forces on the tape such that the tape is biased to a nominal position on the cylindrical body by air pressure on the tape resulting from the air flow interaction with the curved sections. | 08-26-2010 |
| 20100232047 | DATA INTERLEAVING IN TAPE DRIVES - Methods and apparatus for interleaving data in a multitrack tape drive and for writing data on a multitrack tape in the tape drive. One method includes: partitioning the data into m(2 | 09-16-2010 |
| 20110010434 | STORAGE SYSTEM - A pseudo peer-to-peer network system including several clients, each adapted to execute a path driver program. A path driver program is provided, including the steps of locating storage peers connected to the network via a network interface for storing or accessing data items provided in memories of storage peers by means of a global address table. The global address table is updated periodically by at least one configuration server of the pseudo peer-to-peer network. The network further includes at least one time server, which generates a global time clock to which local time clocks of all storage peers of the pseudo peer-to-peer network are synchronized such that a global address table updated by the configuration server is activated by all storage peers at the same scheduled time to be consistent throughout the pseudo peer-to-peer network at all times. | 01-13-2011 |
| 20110029715 | WRITE-ERASE ENDURANCE LIFETIME OF MEMORY STORAGE DEVICES - A memory management system and method for managing memory blocks of a memory device of a computer. The system includes a free block data structure including free memory blocks for writing, and sorting the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receiving new user-write requests to update existing data and relocation write requests to relocate existing data separately, a user-write block pool for receiving youngest blocks holding user-write data (i.e., any page being updated frequently) from the free block data structure, a relocation block pool for receiving oldest blocks holding relocation data (i.e., any page being updated infrequently) from the free block data structure, and a garbage collection pool structure for selecting at least one of user-write blocks and relocation blocks for garbage collection, wherein the selected block is moved back to the free block data structure upon being relocated and erased. | 02-03-2011 |
| 20110102934 | CANCELLATION OF TIME-VARYING PERIODIC DISTURBANCES IN SERVO CONTROL SYSTEMS - Various embodiments for addressing time-varying periodic disturbances in a servo control system are provided. Each of a plurality of coefficients is updated based on an estimation of at least one disturbance frequency. The updated plurality of coefficients is provided to at least one peak filter modifying an input signal of the servo control system. The peak filter is operable in view of the updated plurality of coefficients to cancel at least one of the time-varying periodic disturbances. | 05-05-2011 |
| 20110131369 | LOGIC DEVICE - A logic device for communicating with a memory package with a first protocol, communicating with a memory controller with a second protocol, and for performing a protocol conversion between the first and the second protocol. | 06-02-2011 |
| 20110131472 | SOLID-STATE STORAGE SYSTEM WITH PARALLEL ACCESS OF MULTIPLE FLASH/PCM DEVICES - Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate. | 06-02-2011 |
| 20110134562 | OPERATING A REEL-TO-REEL SYSTEM - A method for operating a reel-to-reel system of a storage device with a first reel, a second reel, a first motor and a second motor, the first motor drives the first reel and the second motor drives the second reel. The system transports a tape supplied by one of the two reels and taken up by the other reel. A tape velocity and tape tension between the first and reels, and a longitudinal displacement are determined. An estimated state vector depends on the tape velocity, tape tension and longitudinal displacement. A reference state vector depends on a predetermined reference tape velocity and a predetermined reference tape tension. A first control signal and a second control signal are generated dependent on the estimated state vector and the reference state vector. The first motor is controlled by the first control signal and the second motor is controlled by the second control signal. | 06-09-2011 |
| 20110145475 | REDUCING ACCESS CONTENTION IN FLASH-BASED MEMORY SYSTEMS - Exemplary embodiments include a method for reducing access contention in a flash-based memory system, the method including selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages, setting the ship stripe to a write state, setting a write queue head in each of the plurality of channels, for each of the plurality of channels in the flash stripe, setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe, allocating write requests according to a write allocation scheduler among the channels, generating a page write and in response to the page write, incrementing the write queue head, and setting the chip stripe into an on-line state when it is full. | 06-16-2011 |
