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Eun, KR

Chang-Woo Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20100206519	TEMPERATURE CONTROL SYSTEM FOR SEMICONDUCTOR MANUFACTURING EQUIPMENT - A temperature control system for semiconductor manufacturing equipment is disclosed, which can properly cool a process chamber adopted in the semiconductor manufacturing equipment such as a wafer etching device. The temperature control system for semiconductor manufacturing equipment includes a thermocline for cooling heat transfer fluid accommodated therein through a heat exchange with a heat exchanger and storing heat energy, a supply line for controlling the temperature of the heat transfer fluid in the thermocline through a heater and supplying the heat transfer fluid with a proper temperature to a process device, a recovery line for forwarding the heat transfer fluid having passed through the process device to the thermocline, and a bypass for forwarding a part of the heat transfer fluid passing through the recovery line to the supply line through the heater.	08-19-2010

Chong Chan Eun, Paju-Si KR

Patent application number	Description	Published
20090279045	Methods of manufacturing liquid crystal display devices - An LCD device and a method for manufacturing the same is disclosed, in which it is possible to correct a problem of insufficient or excessive supply of liquid crystal in an LCD device by controlling an amount of liquid crystal. The method includes preparing a liquid crystal cell comprised of a first substrate, a second substrate, a liquid crystal layer between the first and second substrates, and a first sealant formed in the periphery of the liquid crystal layer between the first and second substrates; measuring an amount of liquid crystal provided to the inside of liquid crystal cell; forming an inlet for liquid crystal in the first sealant; and regulating the amount of liquid crystal by supplying or discharging the liquid crystal through the inlet; and sealing the inlet.	11-12-2009
20100214522	METHOD FOR ADJUSTING AMOUNT OF LIQUID CRYSTAL IN AN LCD DEVICE INCLUDING REDUCING THE THICKNESS OF A SEAL MEMBER TO FORM A REPAIR REGION BY LASER HEATING A METAL PATTERN THEREUNDER - A method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device includes injecting a liquid crystal into a liquid crystal receiving space. The liquid crystal receiving space is disposed between a first substrate, a second substrate that faces the first substrate, and a sealing member interposed between the first and second substrates. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device further includes reducing a thickness of the sealing member at a predetermined portion of the sealing member to form a repair region, and pressurizing the liquid crystal to break the sealing member at the repair region to discharge some of the liquid crystal from the liquid crystal receiving space, so as to adjust the amount of the liquid crystal in the liquid crystal receiving space. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device also includes resealing the broken repair region of the sealing member.	08-26-2010
20100214523	METHOD FOR ADJUSTING AMOUNT OF LIQUID CRYSTAL IN AN LCD DEVICE INCLUDING FORMING A REPAIR REGION BY IRRADIATING A LIGHT ONTO A SEALING MEMBER HAVING A THICKNESS WITH AN INCLUDED METAL PATTERN CAPABLE OF BEING BURNT DOWN - A method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device includes injecting a liquid crystal into a liquid crystal receiving space. The liquid crystal receiving space is disposed between a first substrate, a second substrate that faces the first substrate, and a sealing member interposed between the first and second substrates. The method for adjusting an amount of liquid crystal in an LCD device further includes irradiating a light to a portion of the sealing member while varying an irradiating angle of the light so as to form a repair region at the sealing member that has a thickness smaller than that of the sealing member. The method for adjusting an amount of liquid crystal in an LCD device also comprises pressurizing the liquid crystal to form an opening in the repair region of the sealing member and discharge some of the liquid crystal from the liquid crystal receiving space through the opening formed in the repair region, and sealing the opening of the	08-26-2010
20110170046	METHOD FOR ADJUSTING AMOUNT OF LIQUID CRYSTAL IN AN LCD DEVICE INCLUDING REDUCING THE THICKNESS OF A SEAL MEMBER TO FORM A REPAIR REGION BY LASER HEATING A METAL PATTERN THEREUNDER - A method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device includes injecting a liquid crystal into a liquid crystal receiving space. The liquid crystal receiving space is disposed between a first substrate, a second substrate that faces the first substrate, and a sealing member interposed between the first and second substrates. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device further includes reducing a thickness of the sealing member at a predetermined portion of the sealing member to form a repair region, and pressurizing the liquid crystal to break the sealing member at the repair region to discharge some of the liquid crystal from the liquid crystal receiving space, so as to adjust the amount of the liquid crystal in the liquid crystal receiving space. The method for adjusting an amount of liquid crystal in a liquid crystal display (LCD) device also includes resealing the broken repair region of the sealing member.	07-14-2011

Dae-Gon Eun, Hwaseong-Si KR

Patent application number	Description	Published
20090044111	IMAGE FORMING APPARATUS AND METHOD TO OFFER HELP INFORMATION THEREIN - An image forming apparatus and a method to offer help information therein include an input unit to receive a search request command to search help information from a user, a storage to store at least one help moving picture, a display to display the help moving picture, and a controller to control the display to display a help moving picture corresponding to the search request command.	02-12-2009
20110043850	Image forming apparatus and method of controlling fax thereof - A method of controlling a fax of an image forming apparatus which transmits/receives a fax using a plurality of telephone lines, includes detecting a size of a fax data to be transmitted; checking communication settings of the plurality of telephone lines according to the detection result; detecting whether the plurality of telephone lines are in use; and selecting one of the plurality of telephone lines to transmit the fax data using the communication settings of the telephone lines and whether the telephone lines are in use. An image forming apparatus with a multi-line faxing function capable of transmitting a fax by automatically selecting a telephone line with a favorable communication setting among a plurality of telephone lines, thereby reducing time involved in fax transmission and waste of communication charges.	02-24-2011

Gee Sung Eun, Suwon-Si KR

Patent application number	Description	Published
20120117406	METHOD AND APPARATUS FOR MEMORY MANAGEMENT IN MOBILE DEVICE - A method for memory management in a mobile device, and a mobile device for performing the method, are provided. The mobile device performs garbage collection in a flexible manner after transitioning from the sleep state to the wakeup state according to the paging cycle. This contributes to securing the sleep interval for the mobile device and reducing power consumption. The memory management method includes transitioning from a sleep state to a wakeup state, performing a paging procedure in the wakeup state, determining whether to initiate garbage collection after completion of the paging procedure, performing, when it is determined that garbage collection is to be initiated, garbage collection according to a paging cycle, and transitioning from the wakeup state to the sleep state after completion of garbage collection.	05-10-2012

Hee-Kwon Eun, Yongin-Si KR

Patent application number	Description	Published
20090184912	LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display includes a voltage providing unit for providing a common voltage which is a direct-current (DC) voltage level in each of a plurality of first periods of time, in each of a plurality of second periods of time, and in each of a plurality of third periods of time, wherein each first period of time is separated from each second period of time by at least one third period of time, wherein the DC voltage levels in at least one first period of time, at least one second period of time, and at least one third period of time are different from each other.	07-23-2009
20090284692	DISPLAY DEVICE AND METHOD THEREOF - A display device includes a display panel including a display area and a non-display area defined therein, and a protective substrate disposed on a viewing side of the display panel. At least one light receiving element is provided in the non-display area, and a focusing pattern is disposed on the protective substrate corresponding to a location at which the light receiving element is disposed.	11-19-2009

Hee-Kwon Eun, Yongin-City KR

Patent application number	Description	Published
20120113073	DISPLAY APPARATUS - A display apparatus is disclosed. The display includes a display panel, a signal transmitter, and a driving chip. The signal transmitter is electrically connected with the display panel at a first bonding region of the display panel and receives an input signal from the outside. Further, the driving chip is electrically connected with the display panel at a second bonding region of the display panel and outputs a driving signal in response to the input signal. Further, the signal transmitter includes a base layer, a first conductive layer that is electrically connected with the display panel, and a second conductive layer that covers the first bonding region and the second bonding region. The second conductive layer can block electro static discharge and electro magnetic interference, such that it is possible to prevent display quality of the display apparatus from being deteriorated.	05-10-2012
20120113084	LIQUID CRYSTAL DISPLAY DEVICE AND DRIVING METHOD OF THE SAME - A liquid crystal display (LCD) and a driving method thereof are disclosed. According to some aspects the liquid crystal display (LCD) includes: a display unit including a plurality of pixels arranged in a matrix, a gate line respectively connected to the plurality of pixel rows, and a data line respectively connected to a plurality of pixel columns. The LCD further includes a gate driver configured to generate and sequentially transmit a plurality of gate signals to a plurality of pixel rows through the gate line by row to turn on a switch included in the pixel. The LCD further includes a data driver configured to apply a data voltage according to an image data signal to the pixel during a period in which the switch is turned on; and a common voltage generator configured to generate and apply a common voltage having a polarity that is opposite to the polarity of the data voltage to the pixel. According to some aspects, the period in which the switch is turned on includes a first period and a second period that are separated from each other by a period in which the data voltage is transmitted to at least one pixel row, and during the first period, as a voltage according to a difference between the data voltage transmitted to the pixel and the common voltage applied to the pixel, a voltage for displaying a black image according to a liquid crystal mode of the display unit is stored to the pixel.	05-10-2012

Hee-Kwon Eun, Hwaseong-Si KR

Patent application number	Description	Published
20100177498	LIGHT SOURCE UNIT AND DISPLAY DEVICE HAVING THE SAME - A light source unit configured to shield electromagnetic interference (EMI) due to high frequencies radiated from internal circuits and a display device having the light source unit is provided. The display device includes a display panel displaying an image, a light source supplying light to the display panel, and a first circuit board having the light source mounted thereon and an EMI shielding pattern formed on at least one surface thereof.	07-15-2010

Hee-Seok Eun, Hwaseong-Si KR

Patent application number	Description	Published
20100287447	MEMORY SYSTEM IDENTIFYING AND CORRECTING ERASURE USING REPEATED APPLICATION OF READ OPERATION - Provided is a read method for a memory system. The read method determines whether a read data error is correctable. The read method applies a plurality of read operations at a set read voltage level to identify erasure candidates, when the error is uncorrectable. The read method performs erasure decoding using an error correction code or an error detection code for the erasure candidates.	11-11-2010
20110007563	NONVOLATILE MEMORY DEVICE, SYSTEM, AND RELATED METHODS OF OPERATION - A method of reading a nonvolatile memory device comprises measuring threshold voltage distributions of a plurality of memory cells, combining the measured threshold voltage distributions, and determining local minimum points in the combined threshold voltage distributions to determine read voltages for a predetermined group of memory cells.	01-13-2011
20110038207	FLASH MEMORY DEVICE, PROGRAMMING AND READING METHODS PERFORMED IN THE SAME - The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through N	02-17-2011
20110125975	INTERLEAVING APPARATUSES AND MEMORY CONTROLLERS HAVING THE SAME - An interleaving apparatus may include a first buffer unit configured to buffer input data in units having a size of a sector to generate sector unit data, an encoding unit configured to encode the sector unit data and generate a plurality of parity codes based on the encoding, a second buffer unit configured to interleave the sector unit data and the parity codes and generate interleaving data based on the interleaving, the second buffer unit including a plurality of output buffers configured to store the interleaving data, and an output unit configured to output the interleaving data.	05-26-2011
20110216589	FLASH MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF OPERATING THE SAME - A memory system includes a memory device and a data converting device. The memory device includes a memory cell array which includes a plurality of memory cells. The data converting device includes an encoding device. The encoding device converts input data into converted data by changing a bandwidth corresponding to the input data, and provides the converted data to the memory device. Accordingly, the memory system is capable of improving the reliability of programmed data by changing the bandwidth corresponding to data to be programmed. A method of storing data in a memory system is also disclosed.	09-08-2011
20110216590	NONVOLATILE MEMORY DEVICE USING INTERLEAVING TECHNOLOGY AND PROGRAMMMING METHOD THEREOF - A nonvolatile memory device using interleaving technology is provided. The nonvolatile memory device includes a first controller configured to allocate one of 2	09-08-2011
20110289278	METHOD OF ESTIMATING READ LEVEL FOR A MEMORY DEVICE, MEMORY CONTROLLER THEREFOR, AND RECORDING MEDIUM - A method of estimating a read level for a memory device includes calculating first information corresponding to at least one among information about the number of cells having a particular logic level in data to be programmed and information about the number of cells having a particular cell state and storing the first information during a program operation; reading the data based on a threshold level that has been set and calculating second information about the number of cells in at least one state defined by the threshold level with respect to the read data; calculating third information about the number of cells in the at least one state, which corresponds to the second information, using a probability based on the first information; comparing the second information with the third information; and determining whether to change the threshold level according to the comparison result.	11-24-2011
20120033502	METHOD OF READING DATA IN NON-VOLATILE MEMORY DEVICE, AND DEVICE THEREOF - A method of reading data in a non-volatile memory device. The method includes reading a plurality of memory cells of a first page in a memory cell array using a first read level, reading a plurality of memory cells of a second page adjacent to the memory cells of the first page using a second read level, determining whether a state of each memory cell of the first page has been changed based on the first read level to verify a threshold voltage of each memory cell of the second page based on the second read level, and revising the state of each memory cell of the second page according to a result of the determination.	02-09-2012

Hyung-Lae Eun, Seongnam-Si KR

Patent application number	Description	Published
20110127679	Stacked Structure of Semiconductor Packages Including Through-Silicon Via and Inter-Package Connector, and Method of Fabricating the Same - A stacked structure of semiconductor packages includes an upper semiconductor package, a lower semiconductor package and inter-package connectors. The upper semiconductor package includes an upper package substrate, a plurality of upper semiconductor chips stacked on the upper package substrate, and conductive upper connection lands formed on a bottom surface of the upper package substrate. The lower semiconductor package includes a lower package substrate, a plurality of lower semiconductor chips stacked on the lower package substrate, and lower through-silicon vias vertically penetrating the lower semiconductor chips. The inter-package connectors may electrically connect the through-silicon vias to the upper connection lands.	06-02-2011

Hyung-Lae Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20100013075	STACKED-TYPE SEMICONDUCTOR DEVICE PACKAGE - A stacked-type semiconductor device package is provided. The stacked-type semiconductor device package includes a plurality of stacked semiconductor chip packages with joining electrodes exposed on sides of the semiconductor chip packages and a flexible printed circuit board (flexible PCB) on which the stacked semiconductor chip packages are mounted. The flexible PCB includes a first surface having connecting electrodes corresponding to the joining electrodes of the stacked semiconductor chip packages and a second surface opposite the first surface. The flexible PCB covers the sides of the stacked semiconductor chip packages, and the connecting electrodes of the first surface are connected to the joining electrodes of the stacked semiconductor chip packages.	01-21-2010

Jee Sook Eun, Cheonlabook-Do KR

Patent application number	Description	Published
20090232313	Method and Device for Controlling Security Channel in Epon - A method and device for controlling security of a communication channel between an OLT and an ONU in a secure channel control system of EPON formed of the OLT and the ONU having a cryptographic module, a key management module and a transmitter/receiver for transmitting/receiving frames, the method comprising the steps of: a) distributing a key between the OLT and the ONU; b) transferring the distributed key to the encryption modules of the OLT and ONU; c) activating a corresponding encryption module using the distributed key at one of the OLT and the ONU which starts a security function activation; d) transmitting an encryption module information message including activation state information of the corresponding encryption module from the side (transmitting side) having the activated encryption module to an opponent side (receiving side); and e) activating an encryption module by checking activation state information of the encryption module at the receiving side.	09-17-2009

Jee Sook Eun, Chunlabook-Do KR

Patent application number	Description	Published
20090161874	Key Management Method for Security and Device for Controlling Security Channel In Epon - A key management method for encrypting a frame in an Ethernet passive optical network (EPON) is provided. In the method, secure parameters including secure keys and their association numbers which are used in the present or will be used in the next by each secure channel are managed by composing a key information table. Then, it determines whether an association number of a received encryption frame is valid or not with reference to the key information table if the encryption frame of which association number has been changed is received. A secure key changes if the association number is determined to be valid, and the secure key does not change if the association number is not valid.	06-25-2009

Jong-Moon Eun, Yongin-Si KR

Patent application number	Description	Published
20090214227	DEVELOPING CARTRIDGE, IMAGE FORMING APPARATUS HAVING THE SAME, AND PRINTING METHOD FOR AN IMAGE FORMING APPARATUS - A developing cartridge usable with an image forming apparatus includes a housing having a developing member, a developer storing portion storing developer supplied to the developing member, and a mounting portion allowing at least one developer cartridge storing supplementary developer to be detachably mounted. Printing operations can be performed using the developer available in the developer-storing portion even in the absence of a developer cartridge.	08-27-2009
20090214257	COVER MEMBER, DEVELOPING CARTRIDGE AND DEVELOPING UNIT FOR IMAGE FORMING APPARATUS - A developing unit includes a developer cartridge containing developer and a developing cartridge with a developing cartridge body comprising a mounting portion and a cover member. The mounting portion accepts the developer cartridge for replenishing developer consumed by the developing cartridge. The cover member closes an opening of the mounting portion when the developer cartridge is not inserted into the mounting portion. When a developing unit is initially constructed, printing is performed using developer contained in the developing unit. A developer cartridge containing developer can be inserted into the developing unit, allowing the supply of developer in the developing unit to be replenished.	08-27-2009
20090214268	DEVELOPING APPARATUS, IMAGE FORMING APPARATUS HAVING THE SAME, AND DEVELOPER SUPPLYING METHOD FOR A DEVELOPING APPPARATUS - A developing apparatus usable with an image forming apparatus includes a developer cartridge having an outlet through which developer is discharged, a developing cartridge, in which the developer cartridge is detachably disposed, has an inlet, through which the developer discharged from the outlet of the developer cartridge enters, and a connecting member connecting the outlet of the developer cartridge and the inlet of the developing cartridge so that the developer is supplied from the developer cartridge to the developing cartridge, wherein through the arrangement of the developer cartridge, the developing cartridge and the connecting member, the flow of developer from the developer cartridge to the developing cartridge is regulated based on the developer pressure in the developing cartridge.	08-27-2009
20090214269	DEVELOPER CARTRIDGE, DEVELOPING DEVICE, AND IMAGE FORMING APPARATUS HAVING THE SAME - A developing cartridge and a developing device capable of preventing developer leak which may occur during replacement of a developer containing unit, and an image forming apparatus having the same are provided. The image forming apparatus includes an image forming apparatus body where a transfer path for a printing medium is formed, and a developing device for developing a visible image. The developing device may include, for example, developing cartridge, a developer containing unit, which contains a supply of developer therein, and which is detachably disposed in the developing cartridge to form a developer transfer path fluidly communicating with the developing cartridge, and a shutter unit which closes the developer transfer path when the developer containing unit is removed from the developing cartridge.	08-27-2009

Ki-Chan Eun, Daejeon-Si KR

Patent application number	Description	Published
20090270051	BEAMFORMER AND BEAMFORMING METHOD - Disclosed are a beamformer and a beamforming method. The beamformer includes a plurality of dividers, each of which divides an input signal along a plurality of paths, an input switch which selects one of the dividers such that the input signal is input to the selected divider, a phase shifter which shifts phases of respective output signals from the divider, and an output switch which transmits the output signals from the phase shifter to an antenna.	10-29-2009

Ki-Chan Eun, Daejon KR

Patent application number	Description	Published
20080297283	Mode Transition Circuit for Transferring Radio Frequency Signal and Transceiver Module Having the Same - Provided is a mode transition circuit for transferring a RF signal and a transceiver module having the same. The mode transition circuit includes: a planar transmission line mounted at a RF substrate for receiving a RF signal from a RF signal generating unit; a via formed inside the RF substrate and connected to one side of the planar transmission line for receiving the RF signal from the planar transmission line; at least one of metal patches formed inside the RF substrate and connected to the one side of the via for receiving the RF signal from the via; and a hole formed inside a low frequency substrate and connected to one side of the metal patch for receiving the RF signal from the metal patch.	12-04-2008
20080309427	Transit Structure of Standard Waveguide and Dielectric Waveguide - A transit structure of a standard waveguide and a dielectric waveguide is related to connecting the dielectric dielectric waveguide to the standard waveguide. The transit structure includes: a cavity to match the dielectric waveguide and the standard waveguide, wherein the dielectric waveguide and the standard waveguide are orthogonal to each other to connect. The transit structure drastically reduces a design time by simply implementing a transit structure by using only a dielectric waveguide, a cavity and a standard waveguide on a dielectric substrate and remarkably reduces a size thereof in comparison with a conventional transit structure since all designs are finished in the size of a metal waveguide.	12-18-2008

Tak Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20100002232	Inspection method of circuit substrate - An inspection method for a circuit substrate is disclosed, which inspects electrical properties of a circuit substrate having a multilayered structure, by controlling inspection environments so that dew forms on a surface of the circuit substrate and detecting change of states of the dew to thereby determining variation of a thermal capacity of a conductor with respect to defective contacts or vias, micro vias and a circuit pattern of an inner layer. According to this, the inspection can be performed with respect to a wide area simultaneously and therefore the inspection productivity can be improved. In addition, since the temperature of the conductive wire can be measured directly through change of the dew, the cost for the temperature measurement can be saved. Moreover, the cost for an area sensor to sense the temperature of a wide area may be reduced while improving the inspection speed.	01-07-2010

Yeongchan Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20080233458	FUEL CELL SYSTEM - A fuel cell system including a flat type stack in which a plurality of unit cells, in which an electricity generating reaction is performed, are arranged on a plane, and the fuel cell system pre-heats the fuel provided from the outside for reducing the temperature differences of the fuel provided to each unit cell, thereby reduces the differences in the output characteristics of each unit cell, thereby increasing the electricity generating efficiency of the system.	09-25-2008

Yeongchan Eun, Suwon-Si KR

Patent application number	Description	Published
20090053574	FUEL CELL SYSTEM - A fuel cell system with reduced volume through decreasing the thickness of a stack comprises: a stack which comprises a plurality of membrane electrode assemblies stacked so that the cathode electrodes face each other and the anode electrodes face each other, and separators that are interposed between the membrane electrode assemblies, and which have a flow path passing through from a first face to a second face on a region corresponding to a region where each cathode electrode or anode electrode is formed.	02-26-2009

Yong Seok Eun, Seongnam-Si KR

Patent application number	Description	Published
20090111255	METHOD FOR FABRICATING TRANSISTOR IN SEMICONDUCTOR DEVICE - Provided is a method for fabricating a transistor in a semiconductor device. The method includes forming an etch stop layer pattern over a semiconductor substrate; forming a semiconductor layer for covering the etch stop layer pattern; forming a recess trench that exposes an upper surface of the etch stop layer pattern by etching the semiconductor layer pattern; removing the etch stop layer pattern exposed in the recess trench; and forming a gate that fills the recess trench.	04-30-2009
20090256209	Gate Structure of Semiconductor Device - A gate structure of a semiconductor device comprising a silicon substrate having a field oxide film, a plurality of gates formed by sequentially stacking a first gate dielectric film, a first gate conductive film, and a gate silicide film on the silicon substrate. a thermal oxide film formed on a side of the first gate conductive film, a plurality of trenches formed between the gates, a second gate oxide film formed on an interior wall of each trench; and a second conductive film formed in a spacer shape on a predetermined region of the second gate oxide film, and on a side of the first gate conductive film, the gate silicide film and the thermal oxide film.	10-15-2009
20110306192	METHOD FOR FORMING IMPURITY REGION OF VERTICAL TRANSISTOR AND METHOD FOR FABRICATING VERTICAL TRANSISTOR USING THE SAME - A method for forming an impurity region of a vertical transistor includes forming an impurity ion junction region within a semiconductor substrate, and forming a trench by etching the semiconductor substrate in which the impurity ion junction region is formed. The etching process is performed to remove a portion of the impurity ion junction region, so that a remaining portion of the impurity ion junction region is exposed to a lower side wall of the trench to serve as a buried bit line junction region.	12-15-2011
20120007171	SEMICONDUCTOR MEMORY DEVICE HAVING VERTICAL TRANSISTOR AND BURIED BIT LINE AND METHOD FOR FABRICATING THE SAME - A semiconductor memory device includes an active region protruding upward from a substrate, wherein the active region is arranged next to a trench on the substrate, a first impurity region formed at an upper portion of the active region, a second impurity region formed at a lower portion of the active region, a gate dielectric layer formed along a side of the active region between the first impurity region and the second impurity region, a gate electrode layer formed on the gate dielectric layer, a buried bit line formed at a lower portion of the trench, and a polysilicon layer formed over the buried bit line, wherein the polysilicon layer electrically connects the buried bit line with the second impurity region.	01-12-2012
20120112270	VERTICAL TRANSISTOR HAVING BURIED JUNCTION AND METHOD FOR MANUFACTURING THE SAME - A buried junction is formed in a vertical transistor of a semiconductor device. Wall bodies are formed from a semiconductor substrate, the wall bodies protruding while having a first side surface and a second side surface in the opposite side of the first side surface; forming a one side contact mask having an opening which selectively opens a portion of the first side surface of the wall body; and forming a first impurity layer and a second impurity layer surrounding the first impurity layer by diffusing impurities having different diffusivities into the portion of the first side surface exposed to the opening.	05-10-2012

Yong Seok Eun, Ichon KR

Patent application number	Description	Published
20090045389	PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device and a method for manufacturing the same. The method includes the steps of defining bottom electrode contact holes by removing portions of an insulation layer, to expose bottom electrodes, on a semiconductor substrate on which the bottom electrodes and the insulation layer are sequentially formed; forming amorphous silicon spacers on inner sidewalls of the bottom electrode contact holes; and forming bottom electrode contacts in the bottom electrode contact holes.	02-19-2009

Yong-Seok Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20090004816	METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE - A method of forming an isolation layer in a semiconductor device using rapid vapor deposition to fill in a trench of the semiconductor device comprises forming a hydrophilic layer on the trench and forming a hydrophobic layer on a region other than the trench, and selectively forming a buried insulating layer in the trench using a catalytic reaction of the hydrophilic layer.	01-01-2009
20110045666	METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, including forming gate patterns over a substrate, forming conductive layer covering top and sidewalls of each gate pattern, forming a metal layer for a silicidation process over the conductive layer, and silicifying the conductive layer and the gate patterns using the metal layer.	02-24-2011
20110129974	METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming a plurality of first trenches by etching a substrate, forming a plurality of buried bit lines in the first trenches, forming a plurality of second trenches to expose at least one sidewall of the buried bit lines by etching the substrate, and forming a plurality of one-sidewall contact plugs which fill the second trenches.	06-02-2011

Younghyo Eun, Kyunggi-Do KR

Patent application number	Description	Published
20100207258	CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package including at least a shielding layer for better electromagnetic interferences shielding is provided. The shielding layer disposed over the top surface of the laminate substrate can protect the chip package from the underneath EMI radiation. The chip package may further include another shielding layer over the molding compound of the chip package.	08-19-2010

Young-Seok Eun, Gyeonggi-Do KR

Patent application number	Description	Published
20110073925	SEMICONDUCTOR DEVICE WITH BURIED BIT LINES INTERCONNECTED TO ONE-SIDE-CONTACT AND FABRICATION METHOD THEREOF - A semiconductor device with reduced resistance of a buried bit line, and a method for fabricating the same. The method for fabricating a semiconductor device includes etching a semiconductor substrate to form a plurality of active regions which are separated from one another by trenches formed in between, forming a side contact on a sidewall of each active region, and forming metal bit lines, each filling a portion of a respective trench and connected to the side contact.	03-31-2011