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Estacio
Edgardo Y. Estacio, Itasca, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20080223316 | ENGINE THERMOSTAT HAVING BYPASS PRESSURE-DAMPENING FLUID PASSAGE - A thermostat assembly ( | 09-18-2008 |
Maria Christina B. Estacio, Lapulapu City PH
| Patent application number | Description | Published |
|---|---|---|
| 20090261461 | SEMICONDUCTOR PACKAGE WITH LEAD INTRUSIONS - Semiconductor packages comprising a plurality of lead fingers containing a lead intrusion at the edge of the lead fingers are described. The semiconductor packages comprise an integrated circuit chip that is connected to a die pad and is electrically connected to multiple lead fingers. One or more of the lead fingers may have a lead intrusion disposed on the external exposed lower surface of the lead finger. The lead intrusion may have a height that is about ⅕ to about ½ the height of a lead finger, a width that is about ⅕ to about 1/2 the width of a lead finger, and a depth that is about ¼ to about ¾ the length of the externally exposed lower surface of a lead finger. The lead intrusion increases the area on the lead finger that contacts a bond material, such as solder, and therefore increase the strength of the joint between the semiconductor package and an external surface to which the lead finger is connected (i.e., a PCB). The lead intrusion allows out gassing during reflow of the bond material which may reduce voiding. The lead intrusion can also increase bond joint reliability by providing longer crack propagation length. | 10-22-2009 |
Maria Cristina Estacio, Cebu PH
Maria Cristina B. Estacio, Cebu City PH
| Patent application number | Description | Published |
|---|---|---|
| 20100258923 | PRE-MOLDED CLIP STRUCTURE - A method for making a premolded clip structure is disclosed. The method includes obtaining a first clip and a second clip, and forming a molding material around the first clip comprising a first surface and the second clip comprising a second surface. The first surface of the first clip structure and the second surface of the second clip structure are exposed through the molding material, and a premolded clip structure is then formed. | 10-14-2010 |
| 20100258924 | PRE-MOLDED CLIP STRUCTURE - A method for making a premolded clip structure is disclosed. The method includes obtaining a first clip and a second clip, and forming a molding material around the first clip comprising a first surface and the second clip comprising a second surface. The first surface of the first clip structure and the second surface of the second clip structure are exposed through the molding material, and a premolded clip structure is then formed. | 10-14-2010 |
| 20100258925 | SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME - Semiconductor die packages are disclosed. An exemplary semiconductor die package includes a premolded substrate. The premolded substrate can have a semiconductor die attached to it, and an encapsulating material may be disposed over the semiconductor die. | 10-14-2010 |
Maria Cristina B. Estacio, Lapulapu City PH
| Patent application number | Description | Published |
|---|---|---|
| 20100127375 | WAFER LEVEL CHIP SCALE SEMICONDUCTOR PACKAGES - Wafer-level chip scale (WLCSP) semiconductor packages and methods for making and using the same are described. The WLCSP semiconductor packages contain a grid array of land pads rather than solder balls or solder bumps. The land pads can be provided directly on a semiconductor wafer by using a leadframe interconnect structure that has been formed from a leadframe. The land pads can be used to mount the WLCSP to a circuit board. Such a configuration allows the formation of a thinner chip scale semiconductor package using a simpler manufacturing process, thereby reducing costs and improving performance. Other embodiments are described. | 05-27-2010 |
| 20100148346 | SEMICONDUCTOR DIE PACKAGE INCLUDING LOW STRESS CONFIGURATION - A semiconductor die package. The semiconductor die package comprises a semiconductor die and a molded clip structure comprising a clip structure and a first molding material covering at least a portion of the clip structure. The first molding material exposes an outer surface of the clip structure. The clip structure is electrically coupled to the semiconductor die. The semiconductor die package further comprises a leadframe structure comprising a die attach pad and a plurality of leads extending from the die attach pad. The semiconductor die is on the die attach pad of the leadframe structure. A second molding material covers at least a portion of the semiconductor die and the leadframe structure. The semiconductor die package also includes a heat slug and a thermally conductive material coupling the heat slug to the exposed surface of the clip structure. | 06-17-2010 |
Maria Cristina B. Estacio, Penang MY
| Patent application number | Description | Published |
|---|---|---|
| 20100052127 | FLIP CHIP MLP WITH CONDUCTIVE INK - A flip chip molded leadless package (MLP) with electrical paths printed in conducting ink. The MLP includes a pre-molded leadframe with the electrical paths printed directly thereon. The present invention also provides a method of fabricating the semiconductor package. | 03-04-2010 |