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Eric Becker
Eric Becker, Peoria, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20100262755 | MEMORY SYSTEMS FOR COMPUTING DEVICES AND SYSTEMS - Memory systems and devices are provided. One memory system includes a controller configured to be coupled to a plurality of computing devices, a plurality of Multi-Level Cell (MLC) devices coupled to the controller, and a Single-Level Cell (SLC) device coupled to the controller and the plurality of MLC devices. The MLC devices are configured to split the storage of data across the plurality of MLC devices and the SLC device is configured to function as a parity device for the data. A memory device includes a controller, a plurality of MLC FLASH devices, and a SLC FLASH device. The MLC FLASH devices are configured to split the storage of data across the plurality of MLC FLASH devices and the SLC FLASH device is configured to function as a parity device for the data. Also provided are computing devices including the above memory device. | 10-14-2010 |
Eric Becker, Hochdorf DE
| Patent application number | Description | Published |
|---|---|---|
| 20080300207 | PROTEIN PRODUCTION - The invention concerns the field of protein production and cell culture technology. CERT is identified as a novel in vivo PKD substrate. Phosphorylation on serine 132 by PKD decreases the affinity of CERT towards its lipid target phosphatidylinositol 4-phosphate at Golgi membranes and reduces ceramide transfer activity, identifying PKD as a regulator of lipid homeostasis. The present invention shows that CERT in turn is critical for PKD activation and PKD dependent protein cargo transport to the plasma membrane. The interdependence of PKD and CERT is thus a key to the maintenance of Golgi membrane integrity and secretory transport. | 12-04-2008 |
| 20090018099 | PROTEIN PRODUCTION - The invention concerns the field of protein production and cell culture technology. CERT is identified as a novel in vivo PKD substrate. Phosphorylation on serine 132 by PKD decreases the affinity of CERT towards its lipid target phosphatidylinositol 4-phosphate at Golgi membranes and reduces ceramide transfer activity, identifying PKD as a regulator of lipid homeostasis. The present invention shows that CERT in turn is critical for PKD activation and PKD dependent protein cargo transport to the plasma membrane. The interdependence of PKD and CERT is thus a key to the maintenance of Golgi membrane integrity and secretory transport. | 01-15-2009 |
| 20100021911 | PRODUCTION HOST CELL LINES - The invention concerns the field of cell culture technology. The invention describes production host cell lines comprising vector constructs comprising a DHFR expression cassette. Those cell lines have improved growth characteristics in comparison to DHFR-deficient or DHFR-reduced cell lines such as CHO DG44 and CHO DUKX-B11. The invention especially concerns two cell lines, a representative of each cell line is deposited with the DSMZ under the number DSM ACC2909 (CHOpper® Discovery) and DSM ACC2910 (CHOpper® Standard). The invention further concerns a method of producing proteins using the cells generated by the described method. | 01-28-2010 |
| 20100086967 | CELL GROWTH - The invention concerns the field of cell culture technology. It concerns a method of improving cell growth, especially the growth of biopharmaceutical producer host cells. The invention further concerns a method of producing proteins using the cells generated by the described method. | 04-08-2010 |
Eric Becker, Boise, ID US
| Patent application number | Description | Published |
|---|---|---|
| 20090243677 | Clock generator and methods using closed loop duty cycle correction - Closed-loop duty-cycle correctors (DCCs), clock generators, memory devices, systems, and methods for generating an output clock signal having a particular duty cycle are provided, such as clock generators configured to generate an output clock signal synchronized with a received input clock signal having a predetermined duty cycle. Embodiments of clock generators include closed-loop duty cycle correctors that receive an already-controlled and corrected output signal. For example, DLL control circuitry and DCC control circuitry may each adjust a delay of a variable delay line. The DLL control circuitry adjusts the delay such that an output clock signal is synchronized with an input clock signal. The DCC control circuitry detects a duty cycle error in the output clock signal and adjusts the delay of the variable delay line to achieve a duty cycle corrected output signal. By detecting the duty cycle error in the output signal, the clock generator may achieve improved performance that can correct accumulated duty cycle error and correct for duty cycle error introduced by the duty cycle corrector itself in some embodiments. | 10-01-2009 |
| 20090315600 | LOCKED-LOOP QUIESCENCE APPARATUS, SYSTEMS, AND METHODS - Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to a variable delay line associated with the DLL and/or to a variable frequency oscillator associated with the PLL. An output clock phase associated with the DLL or PLL may thus be held substantially constant following a DLL initialization period. Additional embodiments are disclosed and claimed. | 12-24-2009 |
Eric Becker, Ingelheim DE
| Patent application number | Description | Published |
|---|---|---|
| 20090247609 | SM-PROTEIN BASED SECRETION ENGINEERING - The present invention concerns the field of cell culture technology. It describes a novel method for enhancing the secretory transport of proteins in eukaryotic cells by heterologous expression of Munc18c, Sly1 or other members of the SM protein family. This method is particularly useful for the generation of optimized host cell systems with enhanced production capacity for the expression and manufacture of recombinant protein products. | 10-01-2009 |
Eric Becker, Lebanon, MO US
| Patent application number | Description | Published |
|---|---|---|
| 20090178695 | LIQUID CLEANING APPARATUS FOR CLEANING PRINTED CIRCUIT BOARDS - A method and apparatus for cleaning printed circuit boards are provided. The method includes providing a cleaning apparatus with a housing having a conveyance mechanism for carrying printed circuit boards through the housing. The cleaning apparatus has at least a prewash station, a wash station and a final rinse station therein. The printed circuit boards are carried on the conveyance mechanism to the prewash station. A plurality of fluidic oscillator nozzles of the prewash station are utilized to direct liquid onto the printed circuit boards. Each fluidic oscillator nozzle outputs a stream of liquid with an instantaneous direction that oscillates back and forth relative to a nozzle axis over time. | 07-16-2009 |