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Emil Gizdarski, Santa Clara US

Emil Gizdarski, Santa Clara, CA US

Patent application numberDescriptionPublished
20080294955Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.11-27-2008
20080301510Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.12-04-2008
20080313513Method and Apparatus for Synthesis of Multimode X-Tolerant Compressor - Methods and apparatuses for synthesizing a multimode x-tolerant compressor are described.12-18-2008
20090083596Method and Apparatus for Synthesis of Augmented Multimode Compactors - Methods and apparatuses for synthesizing and/or implementing an augmented multimode compactor are described.03-26-2009
20090083597Method and Apparatus for Synthesis of Augmented Multimode Compactors - Methods and apparatuses for synthesizing and/or implementing an augmented multimode compactor are described.03-26-2009
20090271673Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.10-29-2009
20090313514Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.12-17-2009
20100031101Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.02-04-2010
20100223516Dynamically Reconfigurable Shared Scan-In Test Architecture - A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.09-02-2010
20110093752Method and Apparatus for Synthesis of Augmented Multimode Compactors - Methods and apparatuses for synthesizing and/or implementing an augmented multimode compactor are described.04-21-2011

Patent applications by Emil Gizdarski, Santa Clara, CA US