Patent application number | Description | Published |
20100153820 | MEMORY WITH GUARD VALUE DEPENDENT ERROR CORRECTION - Embodiments of the present disclosure provide methods, systems, and apparatuses related to calculating an error correction code for a program page dependent on guard values that correspond to words of the program page. Other embodiments may be described and claimed. | 06-17-2010 |
20100293317 | PCM MEMORIES FOR STORAGE BUS INTERFACES - A memory controller for a phase change memory (PCM) that can be used on a storage bus interface is described. In one example, the memory controller includes an external bus interface coupled to an external bus to communicate read and write instructions with an external device, a memory array interface coupled to a memory array to perform reads and writes on a memory array, and an overwrite module to write a desired value to a desired address of the memory array. | 11-18-2010 |
20110302353 | NON-VOLATILE MEMORY WITH EXTENDED OPERATING TEMPERATURE RANGE - A method and apparatus are described for measuring a temperature within a non-volatile memory and refreshing at least a portion of the non-volatile memory when the temperature exceeds a threshold temperature for an amount of time. | 12-08-2011 |
20120033519 | TEMPERATURE ALERT AND LOW RATE REFRESH FOR A NON-VOLATILE MEMORY - A method and apparatus are described for measuring a temperature within a non-volatile memory, storing, in a register within the non-volatile memory, a temperature alert comprising one or more bits indicating the non-volatile memory has exceeded a threshold temperature for a period of time, determining, by a host, that the temperature alert is active, and in response to the determination that the temperature alert is active, refreshing at least a portion of the non-volatile memory. | 02-09-2012 |
20120124313 | MULTI-CHANNEL MEMORY WITH EMBEDDED CHANNEL SELECTION - Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same. | 05-17-2012 |
20120163082 | MEMORY WITH SUB-BLOCKS - The apparatuses and methods described herein may comprise a memory array formed on a semiconductor substrate and including a plurality of cells associated with a plurality of word lines. The memory array may comprise a plurality of sub-blocks including a first sub-block and a second sub-block. Each sub-block may comprise a memory cell portion of the plurality of memory cells associated with a corresponding word line portion of the plurality of word lines. The memory cell portions in the first and second sub-blocks may be independently addressable with respect to each other such that a second operation can be performed on at least one memory cell of the memory cell portion of the second sub-block responsive to suspending a first operation directed to at least one memory cell of the memory cell portion of the first sub-block. | 06-28-2012 |
20120290812 | CONFIGURABLE PARTITIONS FOR NON-VOLATILE MEMORY - Example embodiments for configuring a non-volatile memory device may comprise configuring M physical partitions of the non-volatile memory into two or more banks, wherein the two or more banks respectively comprise one or more of the M physical partitions, and wherein at least a first of the M physical partitions comprises a first size and wherein at least a second of the M physical partitions comprises a second size. | 11-15-2012 |
20120317347 | CONTROL AND OPERATION OF NON-VOLATILE MEMORY - Various embodiments comprise apparatuses and methods including a memory controller to control a non-volatile memory array. The memory controller includes a memory array interface coupled to the non-volatile memory array to perform reads and writes on the non-volatile memory array. An overwrite module is configured to write a desired bit value to a specific memory cell within the non-volatile memory array, after receiving the desired bit value and a logical address, regardless of an original value of the memory cell Additional apparatuses and methods are described. | 12-13-2012 |
20120320701 | MULTI-CHANNEL MEMORY AND POWER SUPPLY-DRIVEN CHANNEL SELECTION - Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same. | 12-20-2012 |
20140112071 | MULTI-CHANNEL MEMORY AND POWER SUPPLY-DRIVEN CHANNEL SELECTION - Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same. | 04-24-2014 |
20140149823 | MEMORY WITH GUARD VALUE DEPENDENT ERROR CORRECTION - Embodiments of the present disclosure provide methods, systems, and apparatuses related to calculating an error correction code for a program page dependent on guard values that correspond to words of the program page. Other embodiments may be described and claimed. | 05-29-2014 |
20150067254 | Multi-Interface Memory With Access Control - Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same. | 03-05-2015 |