Ema, JP
Hidetoshi Ema, Kanagawa JP
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20090046784 | Differential signal output device - A differential signal output device is disclosed that outputs transmission data as a differential signal. The device includes a first differential signal generation circuit that amplifies a signal representing the transmission data and generates the differential signal from the amplified signal; a dummy data generation circuit that is synchronized with a reference clock of the transmission data and generates dummy data that change only in a bit where the transmission data do not change; and a second differential signal generation circuit that amplifies a signal representing the dummy data and generates another differential signal from the amplified signal. | 02-19-2009 |
Hiromichi Ema, Tokyo JP
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20080240799 | DESKTOP COLOR IMAGE FORMING APPARATUS AND METHOD OF MAKING THE SAME - The present invention relates to an electrophotographic color image forming apparatus using a tandem-drum development, an indirect image-transfer method, and a vertical sheet supply path. An intermediate image-transfer member is angled relative to a horizontal line such that a rear side of the intermediate image-transfer member away from a recording sheet is lifted and a front side of the intermediate image-transfer member closer to the recording sheet is lowered. Further, image creating mechanisms of the tandem-drum development are aligned and arranged in parallel to a moving image transfer bed of the intermediate image-transfer member, such that one of the image creating mechanisms firstly forming an image faces the rear side of the moving image transfer bed and another one of the image creating mechanisms lastly forming an image faces the front side. | 10-02-2008 |
Hiroshi Ema, Osaka JP
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20150102688 | Contactless Power Supply Mechanism and Secondary Coil for Contactless Power Supply Mechanism - In a contactless power supply mechanism, a power receiving unit for supplying power to an electric device includes a secondary coil and a power supplying unit for supplying power to the power receiving unit includes a primary coil. The primary coil includes a primary core formed of magnetic material and a length of winding wire wounded around the primary core. The secondary coil includes a bar-shaped secondary core formed of magnetic material, a length of winding wire wounded around the secondary core and a magnetic sheet attached to at least one of end faces of the secondary core. The magnetic sheet includes a close-contact portion placed in close-contact with the end face of the secondary core and a curved portion which extends outwards from the close-contact portion beyond an outer edge of the end face and whose normal line has a portion un-parallel with an axial direction of the secondary core. | 04-16-2015 |
Hiroshi Ema, Yao-Shi JP
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20100259502 | LIQUID CRYSTAL DISPLAY UNIT - The present invention aims to achieve a high display quality and cost saving while providing a dual function as a capacitive touch panel. | 10-14-2010 |
20150015079 | Noncontact Power Supply System and Electromagnetic Induction Coil for Noncontact Power Supply Apparatus - A noncontact power supply system includes a power supply device having a primary coil acting as an electromagnetic induction coil for a noncontact power supply system, and a power receiving device having a secondary coil. The primary coil has a primary core and a winding wire. The secondary coil has a secondary core and a winding wire. The primary core includes a base segment, a pair of extension segments, and a pair of opposite segments. The pair of opposite segments are arranged to allow a space to be defined therebetween. The winding wire is wound at least around the pair of opposite segments. The secondary coil is arranged between the pair of opposite segments during power supply. The power receiving device includes a magnetic sheet that is in tight contact with an end surface of the secondary core and has an area larger than that of the end surface. | 01-15-2015 |
Kiyomi Ema, Tokyo JP
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20130075651 | METHOD FOR PRODUCING PURIFIED ACTIVE SILICIC ACID SOLUTION AND SILICA SOL - A method for producing an active silicic acid solution in which the existing amount of foreign matters as plate-like fine particles is reduced and a method for producing a silica sol in which such foreign matters are reduced. The method fulfills the following condition: the existing amount of plate-like fine particles having a length of one side of 0.2 to 4.0 μm and a thickness of 1 to 100 nm is measured to be 0% to 30% in accordance with measuring method A, the method including the steps of: preparing an active silicic acid solution by subjecting an alkali silicate aqueous solution having a silica concentration of 0.5% by mass to 10.0% by mass to cation-exchange to remove alkaline components; and filtering the active silicic acid solution through a filter whose removal rate of particles having a primary particle size of 1.0 μm is 50% or more. | 03-28-2013 |
Kiyomi Ema, Toyama-Shi JP
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20090032994 | Method for Manufacturing Slurry and Mold for Precision Casting - A manufacturing method for a slurry for the production of a precision casting mold that includes a zirconia sol and a refractory powder, and a manufacturing method for a precision casting mold that uses the slurry is provided. The present invention relates to a manufacturing method for a slurry for the production of a precision casting mold for a metal that includes a step in which an alkaline zirconia sol (A1) and a refractory powder (D) are mixed, the alkaline zirconia sol (A1) being obtained by a manufacturing method that includes a step (i), in which a zirconium salt (B1) is heated at 60 to 110° C. in an aqueous medium that includes a carbonate of quaternary ammonium, and a step (ii), in which a hydrothermal treatment is carried out at 100 to 250° C. In addition, the present invention relates to a manufacturing method for a slurry for the production of a precision casting mold for a metal that includes a step in which an acidic zirconia sol (C3) and a refractory powder (D) are mixed, the acidic zirconia sol (C3) being obtained by a manufacturing method that includes a step (I), in which an alkaline zirconia sol (A3) and a zirconium salt (B3) are mixed, and a step II, in which the obtained liquid mixture is caused to react at 80 to 250° C. | 02-05-2009 |
Mitsuhiro Ema, Kanagawa JP
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20090243337 | FRAME WITH CLOSED CROSS-SECTION - There is provided a frame having closed cross-sections capable of preventing a welded joint of the frame from being turned in a wide open state, or being broken when an external force is applied to the frame at the time of vehicle collision, and so forth, and the frame is collapsed. The frame having closed cross-sections is provided with a body cylindrical in shape, wherein first side parts of a first frame member, in pairs, are welded to second side parts of a second frame member, in pairs, respectively, thereby forming a welded joint on both sides of the body, and respective end faces of each of the reinforcing plates, in the widthwise direction of the body, are butted against respective inner side faces of the side parts of the body, corresponding thereto. | 10-01-2009 |
Nobuaki Ema, Tokyo JP
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20140067089 | MAINTENANCE SUPPORT SYSTEM, MAINTENANCE SUPPORT APPARATUS AND MAINTENANCE SUPPORT METHOD - A maintenance support system include includes: a first storage unit which stores first specification information indicating a specification of a process control system which performs control of an industrial process implemented in a plant; an actual condition information extraction unit configured to extract actual condition information indicating an actual condition for the process control system; and a first comparison unit configured to output first information indicating a result of comparing the first specification information stored in the first storage unit with the actual condition information extracted by the extraction unit. | 03-06-2014 |
20150120972 | I/O MODULE - An I/O module includes a base plate, a plurality of universal-circuits, and an option-module. The base plate includes a plurality of connection terminals. A plurality of field devices is electrically connectable to the connection terminals. The universal-circuits correspond to the connection terminals. The universal-circuits are provided on the base plate, and configured to perform an input of analog signals from the field device, an output of analog signals to the field device, an input of discrete signals from the field device, and an output of discrete signals to the field device. The option-module is detachably provided in the base plate. The option-module is provided between a first connection terminal of the connection terminals and a first universal-circuit of the universal-circuits. The option-module includes a first circuit configured to performing transmitting and receiving of signals between the first connection terminal and the first universal-circuit. The first connection terminal corresponds to the first universal-circuit. | 04-30-2015 |
Nobuyuki Ema, Chiba JP
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20090239567 | POC SERVER AUTOMATIC SEARCH METHOD, QUALITY ADJUSTMENT METHOD, AND COMMUNICATION SYSTEM USING THESE METHODS - In conventional services for communicating various media, there are limits to the number of users, the number of group lists, and the like that can be handled by servers provided by communication providers. A service system includes a server provider network | 09-24-2009 |
Noriyuki Ema, Kyoto-Shi JP
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20140098926 | Electronic Circuit and Electronic Device Including the Same - A counter includes: a count processing circuit including a nonvolatile register; a regulator receiving voltage from a direct current power supply, generating power supply voltage based on the received voltage for the count processing circuit, and supplying the power supply voltage to the count processing circuit; and a delay circuit receiving the power supply voltage and supplying a count signal to the count processing circuit after the power supply voltage is supplied to the count processing circuit. After having received the power supply voltage from the regulator, the count processing circuit updates a count value in response to the count signal and holds the updated count value in the nonvolatile register in a non-volatile manner. | 04-10-2014 |
Shinya Ema, Kanagawa JP
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20120142309 | INFORMATION COMMUNICATION SYSTEM, EMERGENCY USE DEVICE, AND PORTABLE COMMUNICATION DEVICE - An information processing system includes an emergency use device and a portable communication device. The emergency use device includes an identification information storage section which stores identification information indicating a usage state and a transmitting section which transmits the identification information stored in the identification information storage section in response to a request from the portable communication device. The portable communication device includes a personal information storage section which stores personal emergency information, a communication section which communicates with the emergency use device, and a communication section which transmits the personal emergency information to a predetermined organization which is allowed to read the personal emergency information stored in the storage section when identification information indicating that the emergency use device is used is received from the emergency use device. | 06-07-2012 |
Tadashi Ema, Okayama JP
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20100292464 | OPTICAL-ISOMER SEPARATING AGENT FOR CHROMATOGRAPHY AND PROCESS FOR PRODUCING THE SAME - A novel optical-isomer separating agent for chromatography is provided which has, as a chiral selector, a macrocyclic amide compound having the ability to function as a chiral shift agent. The optical-isomer separating agent for chromatography is formed by bonding, with a carrier by chemical bonding, a specific ring structure containing an asymmetry recognition site, an amide group as a hydrogen-bond donor site, and a hydrogen-bond acceptor site. | 11-18-2010 |
20120034670 | ORGANIC-INORGANIC COMPOSITE MATERIAL AND PROCESS FOR PRODUCING SAME - Disclosed is an organic-inorganic composite material obtained by chemically modifying a microorganism-derived ceramic material with an organic group, and a process for producing the organic-inorganic composite material. The process is characterized by reacting a microorganism-derived ceramic material with at least one compound selected from the group consisting of silane coupling agents represented by formula (1), silane coupling agents represented by formula (2), and titanate coupling agents represented by formula (3). The organic-inorganic complex can be used in applications for immobilized catalysts and immobilized enzyme catalysts. | 02-09-2012 |
Taiji Ema, Kanagawa JP
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20080280406 | Semiconductor device and its manufacturing method - A semiconductor device manufacturing method includes, forming isolation region having an aspect ratio of 1 or more in a semiconductor substrate, forming a gate insulating film, forming a silicon gate electrode and a silicon resistive element, forming side wall spacers on the gate electrode, heavily doping a first active region with phosphorus and a second active region and the resistive element with p-type impurities by ion implantation, forming salicide block at 500° C. or lower, depositing a metal layer covering the salicide block, and selectively forming metal silicide layers. The method may further includes, forming a thick and a thin gate insulating films, and performing implantation of ions of a first conductivity type not penetrating the thick gate insulating film and oblique implantation of ions of the opposite conductivity type penetrating also the thick gate insulating film before the formation of side wall spacers. | 11-13-2008 |
Taiji Ema, Inabe-Gun JP
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20130001787 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR - A semiconductor device includes: a semiconductor substrate; a semiconductor element formed on the semiconductor substrate; a first metal ring surrounding the semiconductor element; an insulation film formed to cover the semiconductor element and having the first metal ring disposed therein; and a groove formed in the insulation film; wherein: the first metal ring is formed by laminating multiple metal layers in such a manner that respective outside lateral faces of the multiple metal layers are flush with each other, or that outside lateral face of each of the multiple metal layers which is positioned above an underlying metal layer is positioned more inside than outside lateral face of the underlying metal layer; and the groove has first bottom which is disposed inside the first metal ring and extending to a depth of upper surface of an uppermost metal layer of the first metal ring. | 01-03-2013 |
Taiji Ema, Yokohama JP
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20110233735 | SEMICONDUCTOR WAFER AND ITS MANUFACTURE METHOD, AND SEMICONDUCTOR CHIP - A semiconductor wafer includes: a first semiconductor chip area formed with a semiconductor element; a second semiconductor chip area formed with a semiconductor element; and a scribe area sandwiched between the first and second semiconductor chip areas; wherein: the first semiconductor chip area includes a first metal ring surrounding the semiconductor element formed in the first semiconductor chip area; and the metal ring is constituted of a plurality of metal layers including a lower metal layer and an upper metal layer superposed upon the lower metal layer, and the upper metal layer is superposed upon the lower metal layer in such a manner that an outer side wall of the upper metal layer is flush with the outer side wall of the lower metal layer or is at an inner position of the first semiconductor chip area relative to the outer side wall of the lower metal layer. | 09-29-2011 |
20120034751 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a flash memory cell in a first region, forming a first electrode of a capacitor in a second region, forming a first silicon oxide film, a silicon nitride film, and a second silicon oxide film in this order as a second insulating film, removing the silicon nitride film and the second silicon oxide film in a partial region of the first electrode, wet-etching a first insulating film and the second insulating film in the third region, forming a second electrode of the capacitor, and etching and removing the first silicon oxide film in the partial region. | 02-09-2012 |
20120045875 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes: forming first to third gate electrodes in first to third regions, respectively; forming a first mask pattern covering the second region while exposing the first and third regions; forming p-type source drain extensions and p-type pocket regions by ion implantation using the first mask pattern as a mask; forming n-type source drain extensions by ion implantation using the first mask pattern as a mask; forming a second mask pattern covering the first and third regions while exposing the second region; and forming p-type pocket regions by implanting ions of indium into the silicon substrate with the second mask pattern being used as a mask. | 02-23-2012 |
20120080754 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions. | 04-05-2012 |
20120080759 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region. A second transistor includes a second impurity layer of the first conduction type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and being thinner than the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer, a second gate electrode formed above the second gate insulating film, and second source/drain regions of the second conduction type formed in the second epitaxial semiconductor layer and in the semiconductor substrate in the second region. | 04-05-2012 |
20120083087 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A protection film is formed on a semiconductor substrate. Impurity ions are implanted into the semiconductor substrate through the protection film. The impurity is activated to form an impurity layer. The protection film is removed after forming the impurity layer. The semiconductor substrate of a surface portion of the impurity layer is removed after removing the protection film. A semiconductor layer is epitaxially grown above the semiconductor substrate after removing the semiconductor substrate of the surface portion of the impurity layer. | 04-05-2012 |
20120223391 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and a first gate electrode formed above the first gate insulating film, and a second transistor including a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and having a thickness different from that of the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer and having a film thickness equal to that of the first gate insulating film and a second gate electrode formed above the second gate insulating film. | 09-06-2012 |
20130020650 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions. | 01-24-2013 |
20130069206 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view. | 03-21-2013 |
20130299892 | SEMICONDUCTOR DEVICE WITH STI AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate having first and second areas; an STI isolation region being made of an isolation trench formed in the semiconductor substrate and an insulating film burying the isolation trench and defining a plurality of active regions in the first and second areas; a first structure formed on an area from the active region in the first area to a nearby STI isolation region and having a first height; and a second structure formed on an area from the active region in the second area to a nearby STI isolation region and having a second height, wherein the surface of the said STI isolation region in the first area is lower than the surface of said STI isolation region in the second area. | 11-14-2013 |
20130302967 | SEMICONDUCTOR DEVICE WITH STI AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate having first and second areas; an STI isolation region being made of an isolation trench formed in the semiconductor substrate and an insulating film burying the isolation trench and defining a plurality of active regions in the first and second areas; a first structure formed on an area from the active region in the first area to a nearby STI isolation region and having a first height; and a second structure formed on an area from the active region in the second area to a nearby STI isolation region and having a second height, wherein the surface of the said STI isolation region in the first area is lower than the surface of said STI isolation region in the second area. | 11-14-2013 |
20140179072 | SEMICONDUCTOR DEVICE HAVING EPITAXIAL SEMICONDUCTOR LAYER ABOVE IMPURITY LAYER - The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and a first gate electrode formed above the first gate insulating film, and a second transistor including a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and having a thickness different from that of the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer and having a film thickness equal to that of the first gate insulating film and a second gate electrode formed above the second gate insulating film. | 06-26-2014 |
20140235022 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions. | 08-21-2014 |
20140239456 | SEMICONDUCTOR WAFER AND ITS MANUFACTURE METHOD, AND SEMICONDUCTOR CHIP - A semiconductor wafer includes: a first semiconductor chip area formed with a semiconductor element; a second semiconductor chip area formed with a semiconductor element; and a scribe area sandwiched between said first and second semiconductor chip areas; wherein: the first semiconductor chip area includes a first metal ring surrounding the semiconductor element formed in the first semiconductor chip area; and the metal ring is constituted of a plurality of metal layers including an lower metal layer and an upper metal layer superposed upon the lower metal layer, and the upper metal layer is superposed upon the lower metal layer in such a manner that an outer side wall of the upper metal layer is flush with the outer side wall of the lower metal layer or is at an inner position of said first semiconductor chip area relative to said outer side wall of the lower metal layer. | 08-28-2014 |
Taiji Ema, Mie-Ken JP
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20120083080 | METHOD FOR REDUCING PUNCH-THROUGH IN A TRANSISTOR DEVICE - Punch-through in a transistor device is reduced by forming a well layer in an implant region, forming a stop layer in the well layer of lesser depth than the well layer, and forming a doped layer in the stop layer of lesser depth than the stop layer. The stop layer has a lower concentration of impurities than the doped layer in order to prevent punch-through without increasing junction leakage. | 04-05-2012 |
20120083103 | METHOD FOR MINIMIZING DEFECTS IN A SEMICONDUCTOR SUBSTRATE DUE TO ION IMPLANTATION - Defects in a semiconductor substrate due to ion implantation are minimized by forming an implant region in the semiconductor substrate and subjecting the semiconductor substrate to a first anneal to recrystallize the semiconductor substrate. The semiconductor substrate is subjected to a second anneal to suppress diffusion of implanted ions in the semiconductor substrate. The first anneal being at a lower temperature and longer duration than the second anneal. | 04-05-2012 |
Taiji Ema, Inabe JP
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20140035046 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device according to a disclosed embodiment includes: implanting a first impurity into a first region of a semiconductor substrate, forming a semiconductor layer on the semiconductor substrate, forming a trench in the semiconductor layer and the semiconductor substrate, forming an isolation insulating film in the trench, implanting a second impurity into a second region of the semiconductor layer, forming a first gate insulating film and a first gate electrode in the first region, forming a second gate insulating film and a second gate electrode in the second region, forming a first source region and a first drain region at both sides of the first gate electrode, and forming a second source region and a second drain region at both sides of the second gate electrode. | 02-06-2014 |
20140091397 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THEREOF - It is therefore an object of the present invention to provide a method in which, in a semiconductor integrated circuit device, a plurality of transistors having wide-rangingly different I | 04-03-2014 |
20140306292 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region. A second transistor includes a second impurity layer of the first conduction type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and being thinner than the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer, a second gate electrode formed above the second gate insulating film, and second source/drain regions of the second conduction type formed in the second epitaxial semiconductor layer and in the semiconductor substrate in the second region. | 10-16-2014 |
20140308783 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A first transistor includes a first impurity layer of a first conduction type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, a first gate electrode formed above the first gate insulating film, and first source/drain regions of a second conduction type formed in the first epitaxial semiconductor layer and in the semiconductor substrate in the first region. A second transistor includes a second impurity layer of the first conduction type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and being thinner than the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer, a second gate electrode formed above the second gate insulating film, and second source/drain regions of the second conduction type formed in the second epitaxial semiconductor layer and in the semiconductor substrate in the second region. | 10-16-2014 |
20140377921 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - An impurity layer is formed in a first region of a semiconductor substrate, a silicon layer is grown on the semiconductor substrate, a tunnel gate insulating film is formed on a first silicon layer of a second region, a first conductor layer is formed on the tunnel gate insulating film, a first silicon oxide film and a silicon nitride film are formed on a second silicon layer, in a reduced pressure state, oxygen and hydrogen are independently introduced into an oxidation furnace to expose the silicon nitride film to active species of the oxygen and active species of the hydrogen to thereby oxidize the silicon nitride film to form a second silicon oxide film, a gate insulating film is formed on the silicon layer of the first region, a second conductor layer is formed on the second silicon oxide film and on the gate insulating film, the second conductor layer and the first conductor layer of the second region are patterned to form a stack gate of a nonvolatile memory transistor, and the second conductor layer above the first region is patterned to form a gate electrode of an MIS-type transistor. | 12-25-2014 |
20150021732 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first well provided in a semiconductor substrate; a second well provided in the semiconductor substrate, so as to be isolated from the first well; a Schottky barrier diode formed in the first well; and a PN junction diode formed in the second well, with an impurity concentration of the PN junction thereof set higher than an impurity concentration of the Schottky junction of the Schottky barrier diode, and being connected antiparallel with the Schottky barrier diode. | 01-22-2015 |
20150035125 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view. | 02-05-2015 |
Takao Ema, Nagano JP
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20150157667 | METHOD FOR PREPARING DECELLULARIZED TISSUE PRODUCT, AND GRAFT PROVIDED WITH DECELLULARIZED TISSUE PRODUCT - Provided are: a method for preparing a decellularized tissue product in which decellularized tissue can be filled with liquid while changes in the structure of support tissue constituting the decellularized tissue are inhibited; and a graft provided with a decellularized tissue product. The method for preparing a decellularized tissue product includes a reduced-pressure step for bringing an animal-derived decellularized tissue material and a liquid into contact under reduced-pressure conditions, and/or a pressurized step for bringing same into contact under pressurized conditions. The graft is provided with a decellularized tissue product prepared by the method of preparation. | 06-11-2015 |
Takehiro Ema, Otawara-Shi JP
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20090198123 | MEDICAL IMAGING APPARATUS, ULTRASONIC IMAGING APPARATUS, MAGNETIC RESONANCE IMAGING APPARATUS, MEDICAL IMAGE PROCESSING APPARATUS, AND MEDICAL IMAGE PROCESSING METHOD - A differential-image creating unit creates a three-dimensional image on which an artery is highlighted and a three-dimensional image on which a tumor is highlighted. An image compositing unit combines the three-dimensional images to composite an image. A display control unit displays the composite image on a monitor. Moreover, when compositing an image, the image compositing unit composites the image such that a tumor nutrient blood-flow inside and outside tumor is to be displayed in respective different colors. Furthermore, a blood-flow quantity inside tumor measuring unit calculates a blood-flow quantity inside tumor and a ratio of the blood-flow quantity inside tumor to a tumor volume, and the display control unit displays the blood-flow quantity inside tumor and the ratio of the blood-flow quantity inside tumor to the tumor volume. Accordingly, information that is meaningful for determining malignancy of a tumor can be provided. | 08-06-2009 |
20100040200 | MEDICAL IMAGE PROCESSING APPARATUS, ULTRASOUND IMAGING APPARATUS, X-RAY CT (COMPUTED TOMOGRAPHY) APPARATUS, AND METHOD OF PROCESSING MEDICAL IMAGE - A cardiac cavity region specifying part specifies the position of a cardiac cavity region represented in volume data. An image generation plane determining part determines an image generation plane that includes a rotation axis intersecting the cardiac cavity region. With a direction orthogonal to the image generation plane as a view direction, a first image generator generates three-dimensional image data that three-dimensionally represents a region excluding the cardiac cavity region, based on data excluding data included in the cardiac cavity of the volume data. A second image generator generates two-dimensional image data that two-dimensionally represents a region in the image generation plane, based on the data excluding the data included in the cardiac cavity region of the volume data. An image synthesizer synthesizes the three-dimensional image data with the two-dimensional image data. A display controller causes a display to display the synthesized image. | 02-18-2010 |
Tamae Ema, Tokyo JP
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20150095698 | INFORMATION PROCESSING DEVICE, FAULT AVOIDANCE METHOD, AND PROGRAM STORAGE MEDIUM - An information processing device includes a detection unit and an avoidance unit. The detection unit monitors one or both of a utilization rate of memory capacity allocated to a process, and a processing time to take to process a request. The detection unit detects a state where a fault is likely to occur in the information processing device, based on the monitoring result. The avoidance unit executes fault avoidance processing when the state where the fault is likely to occur is detected. The fault avoidance processing is processing that to lowers an upper limit number of threads from a standard value to a limit value that is less than the standard value, and extends a waiting time of a thread from a standard time to an extended time that is longer than the standard time. | 04-02-2015 |
Tatsuhiko Ema, Kamakura-Shi JP
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20110008545 | FILM FORMING METHOD, FILM FORMING APPARATUS, PATTERN FORMING METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS - There is disclosed a film forming method comprising continuously discharging a solution adjusted so as to spread over a substrate by a given amount to the substrate through a discharge port disposed in a nozzle, moving the nozzle and substrate with respect to each other, and holding the supplied solution onto the substrate to form a liquid film, wherein a distance h between the discharge port of the nozzle and the substrate is set to be not less than 2 mm and to be in a range less than 5×10 | 01-13-2011 |
20110212255 | FILM FORMING METHOD, FILM FORMING APPARATUS, PATTERN FORMING METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS - There is disclosed a film forming method comprising continuously discharging a solution adjusted so as to spread over a substrate by a given amount to the substrate through a discharge port disposed in a nozzle, moving the nozzle and substrate with respect to each other, and holding the supplied solution onto the substrate to form a liquid film, wherein a distance h between the discharge port of the nozzle and the substrate is set to be not less than 2 mm and to be in a range less than 5×10 | 09-01-2011 |
Tatsuhiko Ema, Oita-Ken JP
Patent application number | Description | Published |
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20100143849 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device manufacturing method includes: forming a foundation film on a semiconductor wafer; after forming the foundation film, forming a reaction layer of the semiconductor wafer and the foundation film therebetween; removing the foundation film and leaving the reaction layer on the semiconductor wafer; forming a resist film on the reaction layer; patterning the resist film; and using the patterned resist film as a mask to perform processing on the semiconductor wafer. | 06-10-2010 |
20100167213 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device manufacturing method includes: forming a first anti-reflective coating on a semiconductor wafer; forming a second anti-reflective coating on the first anti-reflective coating; forming a resist film on the second anti-reflective coating; selectively exposing the resist film to light; developing the resist film and the anti-reflective coatings after the light exposure; and processing the semiconductor wafer using as a mask a pattern of the resist film obtained by the development. The photosensitizer concentration of the first anti-reflective coating is higher than the photosensitizer concentration of the second anti-reflective coating. | 07-01-2010 |
Tsunetaka Ema, Tokyo JP
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20080247710 | Optical Connector and Optical Fiber Connecting System - An angle type optical connector enables a splicing operation of an optical fiber cable accurately and stably without requiring skilled labor and having a superior on-site installation property. An optical connector is provided with a splicing section for securely supporting an incorporated optical fiber securely supported at a ferrule and an optical fiber of an outside optical fiber cable in an end-abutting condition. The body of the optical connector is provided with a cable holding member able to hold an optical fiber cable. The cable holding member can be set at a temporary position where it makes an optical fiber of the optical fiber cable abut against the incorporated optical fiber at the splicing section in the state holding the optical fiber cable and bends a covered optical fiber of the optical fiber cable between the splicing section and the cable holding member by a pressing force in the lengthwise direction. | 10-09-2008 |
20080304795 | Optical Connector and Optical Fiber Connecting System - A straight type optical connector enables a splicing operation of an optical fiber cable accurately and stably without requiring skilled labor and having a superior on-site installation property. An optical connector is provided with a splicing section for securely supporting an incorporated optical fiber securely supported at a ferrule and an optical fiber of an outside optical fiber cable in an end-abutting condition. The body of the optical connector is provided with a cable holding member able to hold an optical fiber cable. The cable holding member can be set at a temporary position where it makes an optical fiber of the optical fiber cable abut against the incorporated optical fiber at the splicing section in the state holding the optical fiber cable and bends a covered optical fiber of the optical fiber cable between the splicing section and the cable holding member by a pressing force in the lengthwise direction. | 12-11-2008 |
Tunetaka Ema, Tokyo JP
Patent application number | Description | Published |
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20110116745 | OPTICAL CONNECTOR, AND ASSEMBLING METHOD OF OPTICAL CONNECTOR - An optical connector according to an embodiment of the present invention comprises (a) a ferrule incorporating a short fiber; (b) a mechanical splice having a holding part and a fixing part, and adapted so that the fixing part mechanically fixes the short fiber extending from the ferrule held by the holding part, and an optical fiber in an optical cable to butt the short fiber; (c) an outer housing having a housing part in which the mechanical splice is located, and a pair of flexible arms located on both sides of the housing part, the pair of arms each being provided with a locking claw at a tip; and (d) a jacket fixture for fixing a cable jacket, the jacket fixture being coupled to the mechanical splice so that the cable jacket is inserted therein. | 05-19-2011 |