Elsholz
John F. Elsholz, Sandy, UT US
Patent application number | Description | Published |
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20090222286 | EVENT-MARKED, BAR-CONFIGURED TIMELINE DISPLAY FOR GRAPHICAL USER INTERFACE DISPLAYING PATIEN'TS MEDICAL HISTORY - One can display a patient's medical history on a (color-coded), bar-configured chronological timeline. The patient timeline display includes event markers that are located adjacent to specific time increments along the patient timeline when the patient had certain procedures performed. Namely, each procedure is represented by an event marker referenced to its time of performance along the timeline. From the basic bar-configured timeline which contains a pop-up bubble, the physician can see at a glance every major hospital encounter a particular patient has had over the duration of the timeline, e.g., the last 12-months. | 09-03-2009 |
Kerstin Elsholz, Lowenstein DE
Patent application number | Description | Published |
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20080288367 | System and Method For Interacting With a Plurality of Content Receivers - A system and method are described that allow TV viewers to play a game wherein a bidder submitting a lowest unique bid wins an auction article or its cash equivalent. | 11-20-2008 |
Lutz Elsholz, Berlin DE
Patent application number | Description | Published |
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20120249076 | ELECTRIC ENERGY STORE HAVING AN INTEGRATED DEEP DISCHARGE DEVICE - An electric energy storage device has a housing, a positive pole and a negative pole, and a deep discharge device integrated in the housing. The device further has a discharge load and it is configured such that the two poles can be electrically connected by way of the discharge load. There is enabled targeted and controlled deep discharging of the energy storage device and improved operating reliability. | 10-04-2012 |
Udo Elsholz, Munich DE
Patent application number | Description | Published |
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20080216035 | METHOD AND COMPUTER PROGRAM FOR CONFIGURING AN INTEGRATED CIRCUIT DESIGN FOR STATIC TIMING ANALYSIS - A method and a computer program for configuring an integrated circuit design for static timing analysis include receiving module data representative of a hierarchy of modules in an integrated circuit design. A configuration item is selected from a list of configuration items for at least one of the modules. The module data is configured for the module from the selected configuration item into a static timing analysis scenario for performing a static timing analysis of the configured module data. | 09-04-2008 |