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Elchanan
Elchanan Bruckheimer, Zichron Yaakov IL
| Patent application number | Description | Published |
|---|---|---|
| 20120035712 | METHOD AND APPARATUS FOR TRICUSPID VALVE REPAIR USING TENSION - Apparatus is provided, including a radially-expandable percutaneous implant, a tissue anchor, and a connecting element shaped so as to provide an annular loop surrounding a proximal portion of the tissue anchor in a manner which enables rotation of the anchor about a central longitudinal axis thereof when surrounded by the annular loop. The apparatus also includes a flexible longitudinal member coupled at a first portion thereof to at least a portion of the percutaneous implant and at a second portion to the connecting element. The annular loop of the connecting element facilitates rotation of the tissue anchor about the central longitudinal axis such that the anchor can rotate about the central longitudinal axis with respect to the annular loop, the flexible longitudinal member, and the percutaneous implant. Other applications are also described. | 02-09-2012 |
Elchanan Perlin, Haifa IL
| Patent application number | Description | Published |
|---|---|---|
| 20090003335 | Device, System and Method of Fragmentation of PCI Express Packets - Device, system and method of fragmentation of PCI Express packets. For example, an apparatus includes a credit-based flow control interconnect device to fragment a Transaction Layer Packet into a stream of micro-packets, wherein the stream comprises an initial micro-packet and one or more continuation micro-packets. | 01-01-2009 |
| 20090006711 | Device, System and Method of Utilizing PCI Express Packets Having Modified Headers - Device, system, and method of utilizing PCI Express packets having modified headers. For example, an apparatus includes a credit-based flow control interconnect device to generate a credit-based flow control interconnect Transaction Layer Packet in which one or more bits of an ID field carry non-ID data. | 01-01-2009 |
| 20090006932 | Device, System and Method of Modification of PCI Express Packet Digest - Device, system and method of modification of PCI Express packet digest. For example, an apparatus includes a credit-based flow control interconnect device to generate a credit-based flow control interconnect Transaction Layer Packet in which one or more bits of a digest portion carry non-ECRC data. | 01-01-2009 |
Elchanan Rushinek, Newe-Yaraq IL
| Patent application number | Description | Published |
|---|---|---|
| 20090300629 | Scheduling of Multiple Tasks in a System Including Multiple Computing Elements - A method for controlling parallel process flow in a system including a central processing unit (CPU) attached to and accessing system memory, and multiple computing elements. The computing elements (CEs) each include a computational core, local memory and a local direct memory access (DMA) unit. The CPU stores in the system memory multiple task queues in a one-to-one correspondence with the computing elements. Each task queue, which includes multiple task descriptors, specifies a sequence of tasks for execution by the corresponding computing element. Upon programming the computing element with task queue information of the task queue, the task descriptors of the task queue in system memory are accessed. The task descriptors of the task queue are stored in the local memory of the computing element. The accessing and the storing of the data by the CEs is performed using the local DMA unit. When the tasks of the task queue are executed by the computing element, the execution is typically performed in parallel by at least two of the computing elements. The CPU is interrupted respectively by the computing elements only upon their fully executing the tasks of their respective task queues. | 12-03-2009 |
Elchanan Rushinek, Neve Yaraq IL
| Patent application number | Description | Published |
|---|---|---|
| 20110219217 | System on Chip Breakpoint Methodology - A system-on-chip (SoC) with a debugging methodology. The system-on-chip (SoC) includes a central processing unit (CPU) and multiple computing elements connected to the CPU. The CPU is configured to program the computing elements with task descriptors and the computing elements are configured to receive the task descriptors and to perform a computation based on the task descriptors. The task descriptors include a field which specifies a breakpoint state of the computing element. A system level event status register (ESR) attaches to and is accessible by the CPU and the computing elements. Each of the computing elements has a comparator configured to compare the present state of the computing element to the breakpoint state. The computing element is configured to drive a breakpoint event to the event status register (ESR) if the present state of the computing element is the breakpoint state. Each of the computing elements has a halt logic unit operatively attached thereto, wherein the halt logic unit is configured to halt operation of the computing element. The ESR is configurable to drive a breakpoint event to the halt logic units to halt at least one of the computing elements other than the computing element driving the breakpoint event. | 09-08-2011 |
Elchanan Vaserman, Jerusalem IL
| Patent application number | Description | Published |
|---|---|---|
| 20090314735 | INFLATABLE CONTAINER FOR FEEDING BABIES - The invention provides an elastomeric expandable container | 12-24-2009 |