Elarde, US
Peter Charles Elarde, Newark, CA US
Patent application number | Description | Published |
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20090015869 | IMAGE COLLAGE BUILDER - A computer-implemented method includes providing a collage layout comprising one or more image receiving areas on a user interface, moving an image symbol representing a digital image into a first image receiving area in the collage layout; and storing a data structure comprising digital data associated with the digital image and digital data defining the one or more image receiving areas in the collage layout. | 01-15-2009 |
20100223568 | IMAGE COLLAGE BUILDER - A computer-implemented method includes providing a collage layout comprising one or more image receiving areas on a user interface, moving an image symbol representing a digital image into a first image receiving area in the collage layout; and storing a data structure comprising digital data associated with the digital image and digital data defining the one or more image receiving areas in the collage layout. | 09-02-2010 |
Peter Charles Elarde, Redwood City, CA US
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20090287585 | PERSONALIZED GIFT CARDS FOR IMAGING PRODUCTS AND SERVICES - A method for producing a gift card for a gift imaging product, comprises receiving an order of the gift imaging product from a user, producing the gift imaging product, producing the gift card by the user for the gift imaging product; and consolidating the gift card with the gift imaging product into one package. | 11-19-2009 |
Victor C. Elarde, Santa Clarita, CA US
Patent application number | Description | Published |
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20100195683 | CURVED COUPLED WAVEGUIDE ARRAY AND LASER - A semiconductor laser that includes an active region, claddings and electrical contacts to stimulate emissions from the active region, where a coupled waveguide guides emission. The waveguide includes a broad area straight coupling region that fans out into an array of narrower Individual curved coupled waveguides at an output facet of the laser. The individual curved coupled waveguides are curved according to Lorentzian functions that define the waveguide curvature as a function of position along the device. The integral length of each individual curved coupled waveguide differs from adjacent individual curved coupled waveguides by an odd number of half- wavelengths. The coupled waveguide array shapes the optical field output of the semiconductor laser such that a large fraction of the power is emitted into a small angular distribution using interference phenomena. A laser of the invention produces high power output with a very high quality, narrow beam shape. | 08-05-2010 |
20100208761 | QUANTUM WELL ACTIVE REGION WITH THREE DIMENSIONAL BARRIERS AND FABRICATION - The invention provides a quantum well active region for an optoelectronic device. The quantum well active region includes barrier layers of high bandgap material. A quantum well of low bandgap material is between the barrier layers. Three-dimensional high bandgap barriers are in the quantum well. A preferred semiconductor laser of the invention includes a quantum well active region of the invention. Cladding layers are around the quantum well active region, as well as a waveguide structure. | 08-19-2010 |
Victor C. Elarde, Evanston, IL US
Patent application number | Description | Published |
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20100065889 | Porous device for optical and electronic applications and method of fabricating the porous device - A porous device for optical and electronic applications comprises a single crystal substrate and a porous single crystal structure epitaxially disposed on the substrate, where the porous single crystal structure includes a three-dimensional arrangement of pores. The three-dimensional arrangement may also be a periodic arrangement. A method of fabricating such a device includes forming a scaffold comprising interconnected elements on a single crystal substrate, where the interconnected elements are separated by voids. A first material is grown epitaxially on the substrate and into the voids. The scaffold is then removed to obtain a porous single crystal structure epitaxially disposed on the substrate, where the single crystal structure comprises the first material and includes pores defined by the interconnected elements of the scaffold. | 03-18-2010 |
20100126573 | SOLAR CELL WITH A BACKSIDE VIA TO CONTACT THE EMITTER LAYER - A solar cell structure is provided for reducing shadow losses without increasing series resistance in the solar cell device. The solar cell device may form an electrical contact to a solar cell emitter layer from the backside of the solar cell device. With this structure, the emitter contact shadow losses may be reduced significantly while simultaneously decreasing device series resistance. | 05-27-2010 |
20100186822 | HIGH EFFICIENCY GROUP III-V COMPOUND SEMICONDUCTOR SOLAR CELL WITH OXIDIZED WINDOW LAYER - The present application utilizes an oxidation process to fabricating a Group III-V compound semiconductor solar cell device. By the oxidation process, a window layer disposed on a cell unit is oxidized to enhance the efficiency of the solar cell device. The oxidized window has an increased band gap to minimize the surface recombination of electrons and holes. The oxidized window also improves transparency at the wavelengths that were absorbed in the conventional window layer. | 07-29-2010 |
20120227798 | HIGH EFFICIENCY GROUP III-V COMPOUND SEMICONDUCTOR SOLAR CELL WITH OXIDIZED WINDOW LAYER - The present application utilizes an oxidation process to fabricating a Group III-V compound semiconductor solar cell device. By the oxidation process, a window layer disposed on a cell unit is oxidized to enhance the efficiency of the solar cell device. The oxidized window has an increased band gap to minimize the surface recombination of electrons and holes. The oxidized window also improves transparency at the wavelengths that were absorbed in the conventional window layer. | 09-13-2012 |
Victor C. Elarde, Chicago, IL US
Patent application number | Description | Published |
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20130082239 | LIGHT EMITTING DIODE FABRICATED BY EPITAXIAL LIFT-OFF - A method of fabricating a light emitting diode using an epitaxial lift-off process includes forming a sacrificial layer on a substrate, forming a light emitting diode structure on the sacrificial layer with an epitaxial material, forming a light reflecting layer on the light emitting diode structure, and removing the sacrificial layer using an etching process to separate the substrate from the light emitting diode structure. | 04-04-2013 |