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Eiji Toyoda

Eiji Toyoda, Ibaraki-Shi JP

Patent application numberDescriptionPublished
20100148379EPOXY RESIN COMPOSITION FOR SEMICONDUCTOR ENCAPSULATION AND SEMICONDUCTOR DEVICE PRODUCED BY USING THE SAME - An epoxy resin composition for semiconductor encapsulation, which comprises: (A) an epoxy resin having at least two epoxy groups in a molecule thereof; (B) a compound having at least two phenolic hydroxyl groups in a molecule thereof; and (C) particles of a compound represented by general formula (1), the particles having a maximum particle diameter of not greater than 30 μm and a standard deviation of not greater than 5 μm, the particles being dispersed in the epoxy resin composition:06-17-2010
20100319151CLEANING SHEET, CONVEYING MEMBER USING THE SAME, AND SUBSTRATE PROCESSING EQUIPMENT CLEANING METHOD USING THEM - A cleaning sheet for cleaning foreign matters away from the interior of the substrate processing equipment is provided. The cleaning sheet includes a cleaning layer having substantially no tackiness and having a tensile modulus of not lower than 0.98 N/mm12-23-2010
20110143501MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - Provided is a method of producing a semiconductor device having a structure wherein a semiconductor chip 06-16-2011

Patent applications by Eiji Toyoda, Ibaraki-Shi JP

Eiji Toyoda, Niigata JP

Patent application numberDescriptionPublished
20090004825METHOD OF MANUFACTURING SEMICONDUCTOR SUBSTRATE - A method of manufacturing a semiconductor substrate having a DSB structure that enables simplification of a manufacturing process by optimizing a total thickness of oxides on surfaces of two wafers before being bonded together is provided. The method comprises a process of preparing a first semiconductor wafer and a second semiconductor wafer, a process of bonding the first semiconductor wafer and second semiconductor wafer when a total of thickness of an oxide on the surface of the first semiconductor wafer and that of an oxide on the surface of the second semiconductor wafer is 0.4 nm or more and 1.0 nm or less, and a process of providing heat treatment to a semiconductor substrate after the process of the bonding and before a process of thinning one of the wafers.01-01-2009
20100055884MANUFACTURING METHOD FOR SILICON WAFER - In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.03-04-2010
20100197146Method of heat treating silicon wafer - In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.08-05-2010

Patent applications by Eiji Toyoda, Niigata JP

Eiji Toyoda, Kitakanbara-Gun JP

Patent application numberDescriptionPublished
20100038757SILICON WAFER, METHOD FOR MANUFACTURING THE SAME AND METHOD FOR HEAT-TREATING THE SAME - A silicon wafer produced from a silicon single crystal ingot grown by Czochralski process is subjected to rapid heating/cooling thermal process at a maximum temperature (T02-18-2010

Eiji Toyoda, Niigata-Ken JP

Patent application numberDescriptionPublished
20090090934Field Effect Transistor and Method for Manufacturing the Same - A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use of the mask, the mesa structure extending in a direction parallel to an upper face of the semiconductor substrate; narrowing a distance between two sidewalls of the mesa structure and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the two sidewalls extending in the direction and facing each other; forming a gate insulating film covering the mesa structure having the sidewalls flattened; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode.04-09-2009
20110163355Field effect transistor and method for manufacturing the same - A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use of the mask, the mesa structure extending in a direction parallel to an upper face of the semiconductor substrate; narrowing a distance between two sidewalls of the mesa structure and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the two sidewalls extending in the direction and facing each other; forming a gate insulating film covering the mesa structure having the sidewalls flattened; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode.07-07-2011
20110165738Field effect transistor and method for manufacturing the same - A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use of the mask, the mesa structure extending in a direction parallel to an upper face of the semiconductor substrate; narrowing a distance between two sidewalls of the mesa structure and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the two sidewalls extending in the direction and facing each other; forming a gate insulating film covering the mesa structure having the sidewalls flattened; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode.07-07-2011

Eiji Toyoda, Osaka JP

Patent application numberDescriptionPublished
20080286562THERMOSETTING ENCAPSULATION ADHESIVE SHEET - A thermosetting encapsulation adhesive sheet which is used for encapsulating a chip type device (11-20-2008