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Dunworth, US
Jeremy Dunworth, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100273442 | JAMMER DETECTION BASED ADAPTIVE PLL BANDWIDTH ADJUSTMENT IN FM RECEIVER - A frequency synthesizer within an FM receiver employs a Phase-Locked Loop (PLL) to generate a Local Oscillator (LO) signal. The LO signal is supplied to a mixer. The FM receiver also includes jammer detection functionality. If no jammer is detected, then the loop bandwidth of the PLL is set to have a relatively high value, thereby favoring suppression of in-band residual FM. If a jammer is detected, then the loop bandwidth of the PLL is set to have a relatively low value, thereby favoring suppression of out-of-band SSB phase noise. By adaptively changing loop bandwidth depending on whether a jammer is detected, performance requirements on sub-circuits within the PLL can be relaxed while still satisfying in-band residual FM and out-of-band SSB phase noise requirements. By allowing the VCO of the PLL to generate more phase noise due to the adaptive changing of loop bandwidth, VCO power consumption can be reduced. | 10-28-2010 |
Jeremy D. Dunworth, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080248771 | CALIBRATION TECHNIQUES FOR FREQUENCY SYNTHESIZERS - In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more calibration techniques to quickly and precisely calibrate the VCO. In this manner, the analog gain of the VCO can be significantly reduced, which may improve performance of the wireless communication device. Also, the initial state of the PLL may be improved to reduce lock time of the PLL, which may enhance performance of the wireless communication device. | 10-09-2008 |
| 20100323616 | DEVICES FOR CONVEYING WIRELESS POWER AND METHODS OF OPERATION THEREOF - Exemplary embodiments are directed to wireless power. A method may comprise receiving wireless power with a receiver and charging an accumulator with energy from the received wireless power. The method may further include conveying energy from the accumulator to an energy storage device upon a charging level of the accumulator reaching a threshold level. | 12-23-2010 |
| 20110025408 | SWITCHES WITH BIAS RESISTORS FOR EVEN VOLTAGE DISTRIBUTION - Switches with connected bulk for improved switching performance and bias resistors for even voltage distribution to improve reliability are described. In an exemplary design, a switch may include a plurality of transistors coupled in a stack and at least one resistor coupled to at least one intermediate node in the stack. The transistors may have (i) a first voltage applied to a first transistor in the stack and (ii) a second voltage that is lower than the first voltage applied to bulk nodes of the transistors. The resistor(s) may maintain matching bias conditions for the transistors when they are turned off. In one exemplary design, one resistor may be coupled between the source and drain of each transistor. In another exemplary design, one resistor may be coupled between each intermediate node and the first voltage. The resistor(s) may maintain the source of each transistor at the first voltage. | 02-03-2011 |
| 20110115431 | SELECTIVE WIRELESS POWER TRANSFER - Exemplary embodiments are directed to selective wireless power transfer. A method may include transferring wireless power to at least one electronic device while varying at least one parameter of the wireless power transfer according to a wireless power transfer scenario. | 05-19-2011 |
| 20110133794 | PHASE LOCKED LOOP WITH DIGITAL COMPENSATION FOR ANALOG INTEGRATION - A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO). | 06-09-2011 |
| 20110133799 | CONFIGURABLE DIGITAL-ANALOG PHASE LOCKED LOOP - A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop. | 06-09-2011 |
Jeremy Darren Dunworth, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090072912 | OSCILLATOR SIGNAL GENERATION WITH SPUR MITIGATION IN A WIRELESS COMMUNICATION DEVICE - Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated. | 03-19-2009 |
Kevin Dunworth, Dripping Springs, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20080306596 | INTERBODY FUSION DEVICE AND ASSOCIATED METHODS - A method and apparatus is provided for use in spinal fusion procedures. An interbody fusion device has a first piece that is a load bearing device designed to bear the axial loading from the end plates of adjacent vertebrae. A second piece of the interbody fusion device is a retention device whose function is to prevent migration of the load bearing device. One or more fasteners secure the retention device to the vertebrae above and below the load bearing device. The fasteners cause the end plates of the vertebrae to compress the end plates to the load bearing device to facilitate proper fusion. | 12-11-2008 |
| 20090105824 | SPINAL FUSION DEVICE AND ASSOCIATED METHODS - A method and apparatus is provided for use in spinal fusion procedures. An exemplary interbody fusion device includes a synthetic non-metallic radiolucent interbody spacer having an opening formed between its top and bottom surfaces. A cancellous allograft plug is configured to be disposed within the opening formed in the spacer. The cancellous allograft plug can be reconstituted with a material that will help to facilitate fusion of the vertebrae. | 04-23-2009 |
Kevin Dunworth, Dripping Spring, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090105825 | FUSION METHODS USING AUTOLOGOUS STEM CELLS - A method and apparatus is provided for use in spinal fusion procedures. An exemplary interbody fusion device includes a synthetic non-metallic radiolucent interbody spacer having an opening formed between its top and bottom surfaces. A cancellous allograft plug is configured to be disposed within the opening formed in the spacer. The cancellous allograft plug can be reconstituted with a material that will help to facilitate fusion of the vertebrae. | 04-23-2009 |
Kevin Dunworth, Springs, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090105830 | INTERBODY FUSION DEVICE, INTEGRAL RETENTION DEVICE, AND ASSOCIATED METHODS - A method and apparatus is provided for use in spinal fusion procedures. A one or two piece interbody fusion device has a fusion bearing component designed to bear the axial loading from the end plates of adjacent vertebrae. An optional retention piece prevents migration of the load bearing device. One or more fasteners secure the retention device to the vertebrae above and below the load bearing device. The fasteners cause the end plates of the vertebrae to compress the end plates to the load bearing device to facilitate proper fusion. An anti-backout mechanism prevents the fasteners backing out. | 04-23-2009 |
