| Patent application number | Description | Published |
|---|
| 20090206432 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME - An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer. | 08-20-2009 |
| 20090261443 | SHARED-PIXEL-TYPE IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - A shared-pixel-type image sensor including a shared floating diffusion region formed in a semiconductor substrate; first and second adjacent photoelectric conversion regions sharing the floating diffusion region; two transmission elements that alternately transfer electric charges accumulated in the first and second photoelectric conversion regions to the shared floating diffusion region, respectively; a drive element for outputting the electric charges of the shared floating diffusion region; a first contact formed on the floating diffusion region; a second contact formed on the drive element; and a local wire that connects the first and second contacts to electrically connect the floating diffusion region and the drive element, wherein the local wire is formed at a level lower than respective top surfaces of the first and second contacts. | 10-22-2009 |
| 20110080511 | IMAGE SENSORS AND METHODS OF FABRICATING THE SAME - An image sensor and a method of fabricating the same are provided. The image sensor includes a substrate having a pixel region including a plurality of unit pixels and a non-pixel region, at least one first well in the non-pixel region, an interconnect structure on a first side of the substrate, and a base well in the non-pixel region and between the first well and a second side of the substrate. | 04-07-2011 |
