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Dou, CA

Chao Dou, San Diego, CA US

Patent application numberDescriptionPublished
20080305507METHODS AND COMPOSITIONS FOR ASSAYING HOMOCYSTEINE - This invention relates generally to the field of homocysteine detection. In particular, the invention provides a method for determining homocysteine presence or concentration in samples, which method comprises: contacting a sample containing or suspected of containing Hcy with a Hcy co-substrate and a Hcy converting enzyme in a Hcy conversion reaction to form a Hcy conversion product and a Hcy co-substrate conversion product; and assessing the Hcy co-substrate conversion product to determine the presence, absence and/or amount of the Hcy in the sample. The Hcy co-substrate conversion product may be assessed directly, or it may be assessed by further conversion of the Hcy co-substrate conversion product into another material by the action of one or more additional enzymes. A kit for assaying homocysteine based on the same principle is also provided.12-11-2008

Patent applications by Chao Dou, San Diego, CA US

Juying Dou, San Jose, CA US

Patent application numberDescriptionPublished
20090294664ELECTRON BEAM APPARATUS - The present invention includes an electron beam device for examining defects on semiconductor devices. The device includes an electron source for generating a primary electron beam, wherein the total acceleration potential is divided and is provided across the ground potential. Also included is at least one condenser lens for pre-focusing the primary electron beam, an aperture for confining the primary electron beam to ameliorate electron-electron interaction, wherein the aperture is positioned right underneath the last condenser lens, and a SORIL objective lens system for forming immersion magnetic field and electrostatic field to focus the primary beam onto the specimen in the electron beam path. A pair of grounding rings for providing virtual ground voltage potential to those components within the electron beam apparatus installed below a source anode and above a last polepiece of the SORIL objective lens.12-03-2009
20090315444THERMAL FIELD EMISSION CATHODE - A thermal field emission cathode which is employed in an electron microscope, a critical dimension examine tool, an electron beam lithograph machine, an electron beam tester and other electron beam related systems as an electron source is disclosed. Embodiments disclose changing coating shape, coating position and shorten emitter length to extend the lifetime of the field emission cathode.12-24-2009
20100019462APPARATUS FOR INCREASING ELECTRIC CONDUCTIVITY TO A SEMICONDUCTOR WAFER SUBSTRATE WHEN EXPOSURE TO ELECTRON BEAM - An apparatus for increasing electric conductivity to a wafer substrate when exposures to electron beam irradiation is disclosed. More specifically, a more free mechanical contact between a wafer and electric contact pins (within an electrostatic chuck) is provided to significantly reduce the scratch and damage on the wafer backside.01-28-2010
20100102227ELECTRON BEAM APPARATUS - The present invention relates to a charged particle beam apparatus which employs a scanning electron microscope for sample inspection and defect review.04-29-2010
20100103583WAFER GROUNDING METHODOLOGY - An apparatus for increasing electric conductivity to a wafer substrate, when exposed to electron beam irradiation, is disclosed. More specifically, a methodology to breakdown the insulating layer on wafer backside is provided to significantly reduce the damage on the wafer backside while proceeding with the grounding process.04-29-2010
20110051306WAFER GROUNDING AND BIASING METHOD, APPARATUS, AND APPLICATION - A wafer grounding apparatus and method adaptable to a charged particle beam apparatus is disclosed. A wafer substrate is supported by a wafer mount. A grounding pin is arranged to be in contact with a backside film formed on a backside of the wafer substrate. A grounding pulse generator provides at least one pulse to drive the grounding pin such that dielectric breakdown occurring at the backside film leads to establishment of a current path through the backside films. Accordingly, a current flows in the wafer substrate through this current path and then flows out of the wafer substrate via at least one current return path formed from capacitive coupling between the wafer substrate and the wafer mount.03-03-2011
20110084591THERMAL FIELD EMISSION CATHODE - A thermal field emission cathode which is employed in an electron microscope, a critical dimension examine tool, an electron beam lithograph machine, an electron beam tester and other electron beam related systems as an electron source is disclosed. Embodiments disclose changing coating shape, coating position and shorten emitter length to extend the lifetime of the field emission cathode.04-14-2011

Patent applications by Juying Dou, San Jose, CA US

Weiping Dou, San Jose, CA US

Patent application numberDescriptionPublished
20080297419High Isolation Antenna Design for Reducing Frequency Coexistence Interference - Various embodiments are directed to high isolation antenna design for reducing frequency coexistence interference. In one embodiment, a computing device may comprise a printed circuit board including a first internal antenna and a second internal antenna operating in a common frequency band. At least one of the first internal antenna and the second internal antenna may comprise a balanced antenna coupled to an unbalancing element to suppress surface current on the printed circuit board and reduce frequency coexistence interference between the first internal antenna and the second internal antenna. Other embodiments are described and claimed.12-04-2008
20080300027Systems and Techniques for Reducing Power Consumption in a Mobile Computing Device - Various embodiments are directed to systems and techniques for reducing power consumption in a mobile computing device. In one or more embodiments, a mobile computing device may be arranged to determine a user environment based on detected antenna impedance or detected current. After the user environment is determined, the mobile computing device may confirm that total radiation power (TRP) for the mobile computing device at an initial conducted power level exceeds the minimum TRP threshold required by the network carrier to receive acceptable quality of service (QoS). Based on the excess TRP for the particular user environment, the mobile computing device may determine a reduced conducted power level to be input to an antenna system. Accordingly, significant power savings may be achieved. To save additional power, the mobile computing device may automatically adjust and/or improve antenna impedance matching based on user environment allowing a further reduction in conducted power. Other embodiments are described and claimed.12-04-2008
20100026589Antenna Design for an Attached Accessory - Various embodiments are directed to antenna designs that may improve the performance of a mobile computing device. Some embodiments are directed to a mobile computing device assembly comprising accessory incorporating a supplemental antenna designed to be adjacent to at least one internal antenna of a mobile computing device when the accessory is attached to the mobile computing device. The supplemental antenna and the internal antenna may cooperatively form an antenna system for the mobile computing device resulting in improved performance. In various implementations, the use of the supplemental antenna in conjunction with the internal antenna may enhance antenna performance and/or increase antenna efficiency. Other embodiments are described and claimed.02-04-2010

Patent applications by Weiping Dou, San Jose, CA US

Weiping Dou, Milpitas, CA US

Patent application numberDescriptionPublished
20090295651INTERNAL DIVERSITY ANTENNA ARCHITECTURE - Various embodiments of an internal diversity antenna architecture are described. In one embodiment, a wireless device may include a housing enclosing a printed circuit board, a first diversity antenna, and a second diversity antenna internal to the housing. The second diversity antenna may be positioned substantially near the bottom of the housing or the bottom the printed circuit board. Other embodiments are described and claimed.12-03-2009