Patent application number | Description | Published |
20110049457 | Non-volatile memory device including phase-change material - A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by In | 03-03-2011 |
20110155985 | PHASE CHANGE STRUCTURE, AND PHASE CHANGE MEMORY DEVICE - A phase change structure includes a first phase change material layer pattern and a second phase change material layer pattern. The first phase change material layer pattern may partially fill a high aspect ratio structure, and the second phase change material layer pattern may fully fill the high aspect ratio structure. The first phase change material layer pattern may include a first phase change material, and the second phase change material layer pattern may include a second phase change material having a composition substantially different from a composition of the first phase change material. | 06-30-2011 |
20110155989 | VARIABLE RESISTANCE MEMORY DEVICE AND METHODS OF FORMING THE SAME - A semiconductor memory device includes a first electrode and a second electrode, a variable resistance material pattern including a first element disposed between the first and second electrode, and a first spacer including the first element, the first spacer disposed adjacent to the variable resistance material pattern. | 06-30-2011 |
20110186798 | Phase Changeable Memory Devices and Methods of Forming the Same - Phase changeable memory devices are provided including a mold insulating layer on a substrate, the mold insulating layer defining an opening therein. A phase-change material layer is provided in the opening. The phase-change material includes an upper surface that is below a surface of the mold insulating layer. A first electrode is provided in the opening and on the phase-change material layer. A spacer is provided between a sidewall of the mold insulating layer and the phase-change material layer and the first electrode. The upper surface of the first electrode is coplanar with the surface of the mold insulating layer. Related methods are also provided. | 08-04-2011 |
20120040508 | Method of Forming Semiconductor Device Having Self-Aligned Plug - A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug. | 02-16-2012 |
20120282751 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING FINE PATTERNS - A method of fabricating an integrated circuit device includes forming first and second patterns extending in first and second directions, respectively, on a target layer. The first patterns comprise a metal oxide and/or metal silicate material having an etch selectivity with respect to that of the target layer. The second patterns comprise a material having an etch selectivity with respect to those of the first patterns and the target layer. The target layer is selectively etched using the first patterns and the second patterns as an etch mask to define holes respectively extending through the target layer to expose a layer therebelow. At least one of the first and second patterns is formed using respective mask patterns formed by a photolithographic process, and the at least one of the first and second patterns have a finer pitch than that of the respective mask patterns. | 11-08-2012 |
20120305522 | MEMORY DEVICES AND METHOD OF MANUFACTURING THE SAME - Memory devices and methods of forming memory devices including forming a plurality of preliminary electrodes, each of the plurality of preliminary electrodes including a protruding region, protruding from a first mold insulating layer, forming a second mold insulating layer on the first mold insulating layer, removing at least a portion of the plurality of preliminary electrodes to form a plurality of openings in the second mold insulating layer and a plurality of lower electrodes, and forming a plurality of memory elements in the plurality of openings. Memory devices and methods of forming memory devices including forming one or more insulating layers on sidewalls of all or part of a plurality of lower electrodes and/or a plurality of memory elements. | 12-06-2012 |
20120322223 | METHODS OF MANUFACTURING PHASE-CHANGE MEMORY DEVICES - A phase-change memory device includes a word line on a substrate and a phase-change memory cell on the word line and comprising a phase-change material pattern. The device also includes a non-uniform conductivity layer pattern comprising a conductive region on the phase-change material pattern and a non-conductive region contiguous therewith. The device further includes a bit line on the conductive region of the non-uniform conductivity layer pattern. In some embodiments, the phase-change memory cell may further include a diode on the word line, a heating electrode on the diode and wherein the phase-change material layer is disposed on the heating electrode. An ohmic contact layer and a contact plug may be disposed between the diode and the heating electrode. | 12-20-2012 |
20120326110 | PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A phase change memory device includes an impurity region on a substrate, the impurity region being in an active region, a metal silicide pattern at least partially buried in the impurity region, a diode on the impurity region, a lower electrode on the diode, a phase change layer pattern on the lower electrode, and an upper electrode on the phase change layer pattern. | 12-27-2012 |
20130099190 | NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A diode may be foamed within a molding layer on a substrate. A conductive buffer pattern having a greater planar area than the diode may be on the diode and molding layer. An electrode structure may be on the conductive buffer pattern. A data storage pattern may be on the electrode structure. One lateral surface of the conductive buffer pattern may be vertically aligned with one lateral surface of the electrode structure. | 04-25-2013 |
20130102150 | METHOD OF FABRICATING NON-VOLATILE MEMORY DEVICE HAVING SMALL CONTACT AND RELATED DEVICES - A sacrificial pattern is formed to partially cover the pipe-shaped electrode. A sacrificial spacer is formed on a lateral surface of the sacrificial pattern. The sacrificial spacer extends across the pipe-shaped electrode. The sacrificial spacer has a first side and a second side opposite the first side. The sacrificial pattern is removed to expose the pipe-shaped electrode proximal to the first and second sides of the sacrificial spacer. The pipe-shaped electrode exposed on both sides of the sacrificial spacer may be primarily trimmed. The pipe-shaped electrode is retained under the sacrificial spacer to form a first portion, and a second portion facing the first portion. The second portion of the pipe-shaped electrode is secondarily trimmed. The sacrificial spacer is removed to expose the first portion of the pipe-shaped electrode. A data storage plug is formed on the first portion of the pipe-shaped electrode. | 04-25-2013 |
20130109148 | METHODS OF FORMING A PATTERN AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME | 05-02-2013 |
20130126510 | NON-VOLATILE MEMORY DEVICES HAVING DUAL HEATER CONFIGURATIONS AND METHODS OF FABRICATING THE SAME - A non-volatile memory device includes a data storage structure coupled between first and second conductive lines of the memory device. The data storage structure includes a conductive lower heater element, a data storage pattern, and a conductive upper heater element sequentially stacked. At least one sidewall surface of the data storage pattern is coplanar with a sidewall surface of the upper heater element thereabove and a sidewall surface of the lower heater element therebelow. Related fabrication methods are also discussed. | 05-23-2013 |
20130143380 | METHODS OF FORMING A PHASE CHANGE LAYER AND METHODS OF FABRICATING A PHASE CHANGE MEMORY DEVICE INCLUDING THE SAME - A phase change structure includes a first phase change material layer pattern and a second phase change material layer pattern. The first phase change material layer pattern may partially fill a minute structure, and the second phase change material layer pattern may fully fill the minute structure. The first phase change material layer pattern may include a first phase change material, and the second phase change material layer pattern may include a second phase change material having a composition substantially different from a composition of the first phase change material. | 06-06-2013 |
20130256621 | PHASE-CHANGE MEMORY DEVICES - A phase-change memory device includes a diode, a plug, a doping layer pattern, a phase-change layer pattern and an upper electrode. The diode is disposed on a substrate. The plug is disposed on the diode and has a bottom surface whose area is equal to the area of a top surface of the diode. The plug is formed of metal or a conductive metallic compound. The doping layer pattern is disposed on the plug and has a bottom surface whose area is equal to the area of a top surface of the plug, and includes the same metal or conductive metallic compound as the plug. The phase-change layer pattern is disposed on the doping layer pattern. The upper electrode is disposed on the phase-change layer pattern. | 10-03-2013 |
20130302966 | Method of Forming Semiconductor Device Having Self-Aligned Plug - A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug. | 11-14-2013 |