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Dongkyun
Dongkyun Kim, Daegu KR
| Patent application number | Description | Published |
|---|---|---|
| 20090296704 | METHOD FOR MULTI-PATH SOURCE ROUTING IN SENSOR NETWORK - A method for a multi-path source routing in a sensor network. In the sensor network including a sink node and a plurality of sensor nodes, the sensor network transmits data packets through a downlink route set based on a routing table generated by collecting uplink neighbor information of each sensor node from a control message for initializing a network and an uplink route formed by using uplink neighbors of each sensor node. Uplink neighbors for transmitting data from each sensor node to the sink node by performing a network initialization process and acquires the information in the sink node to generate the multi-path is maintained. As a result, it has advantages of reducing a control message overhead while using the multi-path and increasing scalability and energy efficiency by keeping a routing table small in the sensor node regardless of the size of the network. | 12-03-2009 |
Dongkyun Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20110176608 | METHOD AND APPARATUS FOR DETERMINING INTRA PREDICTION MODE, AND METHOD AND APPARATUS FOR ENCODING/DECODING VIDEO USING SAME - Disclosed are a method and apparatus for determining an intra prediction mode, and for encoding/decoding video using the same. An apparatus for determining an intra prediction mode is provided, the apparatus comprising a calculator to calculate a variation of adjacent pixels to a current block; a threshold setter to set a threshold to evaluate the pixel variation; a comparator to compare between the variation and the threshold; a first prediction mode determination unit to determine a single predetermined prediction mode to be an optimal prediction mode if the variation is below the threshold; and a second prediction mode determination unit to determine a particular prediction mode from a plurality of prediction modes to be the optimal prediction mode through a rate-distortion optimization by performing intra predictions in the plurality of prediction modes if the variation is greater than or equal to the threshold. | 07-21-2011 |
Dongkyun Ko, Kyunggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100109132 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure. | 05-06-2010 |
| 20100110656 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package including a plurality of conductive bodies and a shielding layer for better electromagnetic interferences shielding is provided. The shielding layer over the molding compound contacts with the conductive bodies disposed on the substrate, and the shielding layer and the conductive bodies function as EMI shield. The shielding layer is electrically grounded through the conductive bodies connected to the laminate substrate and the ground plane of the substrate. | 05-06-2010 |
| 20120098109 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure. | 04-26-2012 |
Dongkyun Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120098092 | SEMICONDUCTOR DEVICE CAPACITORS INCLUDING MULTILAYERED LOWER ELECTRODES - A capacitor of a semiconductor device may include a lower electrode on a semiconductor substrate. A dielectric film can cover a surface of the lower electrode and an upper electrode can cover the dielectric film. The lower electrode can be a first conductive pattern that includes a bottom portion and a sidewall portion that defines a groove region. A core support pattern can be in the groove region of the first conductive pattern and a second conductive pattern can electrically connect to the first conductive pattern on the core support pattern. | 04-26-2012 |
Dongkyun Seo, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100052216 | NANO IMPRINT LITHOGRAPHY USING AN ELASTIC ROLLER - Imprint lithography devices and methods of lithography are provided. | 03-04-2010 |