| Patent application number | Description | Published |
|---|
| 20090029736 | MOBILE TERMINAL AND SIM INDICATIVE INFORMATION DISPLAY METHOD THEREOF - A subscriber identity module (SIM) indicative information display method of the present invention includes receiving SIM indicative information one of a SIM card detected in one of the SIM card slots, registering the SIM indicative information with a SIM identity of the SIM card, detecting a SIM indicative information request requesting the SIM indicative information of the SIM card, and displaying the SIM indicative information mapped to the SIM identity of the SIM card when a SIM indicative information request is detected. | 01-29-2009 |
| 20090063967 | MOBILE TERMINAL AND METHOD FOR EXECUTING APPLICATIONS THROUGH AN IDLE SCREEN THEREOF - A mobile terminal having a touch screen and a method for executing applications through an idle screen thereof are disclosed. When a smart screen is called through an idle screen, it is displayed on the idle screen so as to overlap the idle screen. The smart screen displayed on the idle screen includes one of a plurality of application executing screens and a scroll bar to change the application executing screen displayed on the idle screen. | 03-05-2009 |
| 20090245453 | DECAY HEAT REMOVAL SYSTEM COMPRISING HEAT PIPE HEAT EXCHANGER - Disclosed herein is a decay heat removal system, including: a decay heat exchanger that absorbs decay heat generated by a nuclear reactor; a heat pipe heat exchanger that receives the decay heat from the decay heat exchanger through a sodium loop for heat removal and then discharges the decay heat to the outside; and a sodium-air heat exchanger that is connected to the heat pipe heat exchanger through the sodium loop and discharges the decay heat transferred thereto through the sodium loop to the outside. According to the decay heat removal system, a heat removal capability can be realized by the heat pipe heat exchanger at such a high temperature at which the safety of a nuclear reactor is under threat, and a cooling effect can be obtained through the sodium-air heat exchanger at a temperature lower than that temperature. | 10-01-2009 |
| 20100299759 | DIGITAL INFORMATION SECURITY SYSTEM, KERNAL DRIVER APPARATUS AND DIGITAL INFORMATION SECURITY METHOD - Disclosed herein are a digital information security system, a kernel driver apparatus, and a digital information security method. The digital information security system includes a user module configured to operate in a user mode and to provide environment setting information comprising policy information about a use of digital information, and a kernel driver configured to operate in a kernel mode, to acquire information generated by an application of the user mode for the use of digital information, and to perform rights control regarding the use of digital information based on the acquired information and the policy information. Accordingly, the construction of a security system can be simplified, and the security of a security system can be improved. | 11-25-2010 |
| 20110010559 | METHOD FOR ENCRYPTING DIGITAL FILE, METHOD FOR DECRYPTING DIGITAL FILE, APPARATUS FOR PROCESSING DIGITAL FILE AND APPARATUS FOR CONVERTING ENCRYPTION FORMAT - Disclosed herein are a digital file encryption method, a digital file decryption method, a digital file processing apparatus, and an encryption format conversion apparatus. The digital file encryption method includes encrypting a file using specific encryption information, storing the encrypted file in a file system, and storing the encryption information in a stream provided by the file system. Accordingly, since file lengths before and after encryption are identical to each other, an application needs not to consider a header length or perform offset correction when using an encrypted file. | 01-13-2011 |
| 20110047199 | CORRELATION APPARATUS AND METHOD FOR ACQUIRING ROBUST SYNCHRONIZATION - Provided is a correlation apparatus and method for acquiring a robust synchronization. The correlation method may include: calculating a received symbol phase difference with respect to a received symbol; calculating a correlation SoF symbol phase difference with respect to a correlation SoF symbol for a correlation; calculating a differential correlation value of the received symbol using the received symbol phase difference and the correlation SoF symbol phase difference; calculating a Euclidean distance value of the received symbol using the received symbol phase difference; and calculating a sum correlation value of the received symbol using the differential correlation value and the Euclidean distance value. | 02-24-2011 |
| 20110102747 | LASER SCANNING DISPLAY AND BEAM ALIGNMENT METHOD THEREOF - A laser scanning display including a micro scanning mirror, and a beam alignment method thereof are disclosed. A scanning display includes a frame, at least one light source fixedly secured to the frame, a lens positioned in front of a light emission surface of the light source, the lens having a holder detachably mounted to an external adjusting device which is to make fine adjustment to finish beam alignment, and a fastening portion for fastening the lens having beam alignment finished thus to the frame. | 05-05-2011 |
| 20110241736 | INPUT BUFFER - An input buffer includes a first amplification block, a second amplification block, and a buffer block. The first amplification block is configured to be driven by an external voltage, to differentially amplify an input signal and a reference voltage in response to a bias voltage, and to subsequently generate first and second differential signals. The second amplification block is configured to be driven by an internal voltage, to differentially amplify the first and second differential signals, and to generate an output signal. The buffer block is configured to be driven by the internal voltage, to buffer the output signal, and to output an inverted output signal. | 10-06-2011 |
| 20110242909 | SEMICONDUCTOR DEVICE AND SYSTEM - A system includes a data transmitting device and a data receiving device. The data transmitting device includes a data strobe signal generation unit configured to generate first and second data strobe signals in response to an output enable signal, and a data output unit configured to transmit data in synchronization with the first data strobe signal. The data receiving device is configured to receive the data in synchronization with the second data strobe signal. | 10-06-2011 |
| 20120062280 | OUTPUT DRIVER - An output driver includes a control signal generation unit configured to generate a control signal in response to a driving strength signal and a power supply voltage level, and a driving signal generation unit configured to buffer a pre-driving signal and generate a driving signal for driving an output data, wherein a driving strength of the driving signal is adjusted in response to the control signal. | 03-15-2012 |
| 20120087400 | METHOD FOR RECEIVING DATA IN MULTI INPUT MULTI OUTPUT - Disclosed is a method for receiving data in a Multi Input Multi Output (MIMO) system, the method comprising: decoding data transmitted from a transmitter by using one beam-forming vector included in a codebook that beam-forming vectors are formed in a hierarchical structure according to at least one of change directions of radio channels, the number of channel change directions, and a change rate; determining whether to update the beam-forming vector based on the radio channel changes; selecting other beam-forming vector included in the codebook having a hierarchical structure when it is determined that update for the beam-forming vector is required; feed-backing information about an index indicating where the selected beam-forming vector is located in the hierarchical structure of the codebook to the transmitter; and decoding data received from the transmitter by using the selected beam-forming vector. | 04-12-2012 |
| 20120093250 | METHOD AND APPARATUS FOR DATA TRANSMISSION BASED ON DISTRIBUTED DISCRETE POWER CONTROL IN COOPERATIVE MULTI-USER MULTI-INPUT MULTI-OUTPUT SYSTEM - Disclosed are a method and apparatus capable of enhancing a closed loop multi-input multi-output (MIMO) capacity through distributed discrete power control in the case of cooperatively transmitting information to multiple users through a downlink. | 04-19-2012 |
| Patent application number | Description | Published |
|---|
| 20080309523 | APPARATUS AND METHOD OF GENERATING DBI SIGNAL IN SEMICONDUCTOR MEMORY APPARATUS - An apparatus for generating a DBI signal in a semiconductor memory apparatus includes a data switching detection unit that detects whether or not previous data is consistent with current data and outputs a detection signal according to a detection result, and a DBI detection unit that outputs a DBI signal according to a difference in charge sharing level using the detection signal. Therefore, it is possible to minimize current consumption. Further, since there is no effect due to resistance skew of a transistor, an error in DBI signal generation and an error in data transfer accordingly can be prevented. Therefore, it is possible to improve the reliability of a system to which a semiconductor memory apparatus is applied. | 12-18-2008 |
| 20100039878 | CIRCUIT AND METHOD FOR GENERATING DATA OUTPUT CONTROL SIGNAL FOR SEMICONDUCTOR INTEGRATED CIRCUIT - The data output control signal generating circuit include sa delay correction signal generating unit that delays an input signal by a phase difference between a clock and a delay locked loop clock, and latches the delayed signal to generate a plurality of output enable signals. A column address strobe latency control multiplexer selects the output enable signal corresponding to column address strobe latency among the plurality of output enable signals, on the basis of the signal obtained by delaying the input signal by the phase difference between the clock and the delay locked loop clock, and outputs the selected signal as the data output control signal. | 02-18-2010 |
| 20100142297 | DATA DRIVER - A data driver is presented in which the data driver includes a termination/pull-up driver and a pull-down driver. The termination/pull-up driver is configured to perform a termination operation and a pull-up operation at the same time for a data output terminal during an active interval of a semiconductor memory. The pull-down driver is configured to be activated when the semiconductor memory performs a read operation, and configured to pull down the output terminal in response to a level of an input data. | 06-10-2010 |
| 20100156455 | IMPEDANCE CALIBRATION PERIOD SETTING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - An impedance calibration period setting circuit includes a command decoder and an impedance calibration activation signal generator. The command decoder combines external signals to generate a refresh signal. The impedance calibration activation signal generator is configured to generate an impedance calibration activation signal in response to the refresh signal and an address signal. The impedance calibration period setting circuit prevents abnormal changes in an impedance calibration code and reduces current consumption. | 06-24-2010 |
| 20100237901 | SEMICONDUCTOR APPARATUS AND DATA OUTPUT METHOD OF THE SAME - A semiconductor apparatus includes a driving control unit configured to receive an enable signal and a data signal. The driving control unit generates a pull-up source signal and a pull-down source signal. The driving control unit is configured to delay the generation timing of the pull-up source signal or the pull-down source signal. The semiconductor apparatus also includes a driver configured to generate a driving data signal by driving the pull-up source signal and the pull-down source signal from the driving control unit. A POD impedance control unit is connected to the output terminal of the driver and has a variable resistance value. | 09-23-2010 |
| 20100238742 | APPARATUS AND METHOD FOR OUTPUTTING DATA OF SEMICONDUCTOR MEMORY APPARATUS - An apparatus for outputting data of a semiconductor memory apparatus, which is capable of varying the slew rate and the data output timing, includes a bias generator that generates a bias having a level corresponding to a set value, a slew rate controller that controls a pull-up slew rate or a pull-down slew rate of input data on the basis of the bias generated by the bias generator, and a data outputting unit that outputs data on the basis of the slew rate controlled by the slew rate controller. Therefore, it is possible to satisfy various operational conditions without changing the structure of the circuit and to correspond rapidly and appropriately whit a change in the system, which enables the applied range of the products to be extended. | 09-23-2010 |
| 20100327962 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a reference voltage generating block, a circuit block, and a transmission line. The reference voltage generating block generates a first reference voltage and generates and outputs a digital code corresponding to the level of the first reference voltage. The circuit block converts the digital code into a second reference voltage and uses the second reference voltage for operation related to the function of the semiconductor integrated circuit. The transmission line is connected between the reference voltage generating block and the circuit block to allow transmission of the digital code to the circuit block. | 12-30-2010 |
| 20110156938 | DATA OUTPUT CIRCUIT - A data output circuit is presented. The data output circuit includes: a data serializer and a driver. The data serializer is configured to generate serial data using first parallel data. The driver is configured to drive the serial data to generate output data. The data serializer is also configured to generate the serial data by multiplexing second parallel data generated by changing a power domain of the first parallel data. | 06-30-2011 |
| 20110204941 | DELAY LOCKED LOOP SEMICONDUCTOR APPARATUS THAT MODELS A DELAY OF AN INTERNAL CLOCK PATH - A delay locked loop semiconductor apparatus that models a delay of an internal clock path is presented. The semiconductor apparatus includes: a DLL and a detection code output block. The DLL includes a delay model unit in which a delay value of an internal clock path is modeled and is configured to output a DLL clock signal of which the phase is controlled by reflecting the delay value of the internal clock path into an applied input clock signal. The detection code output block is configured to output a phase difference detection code having a code value corresponding to a phase difference between a first phase correction clock signal generated by reflecting a model delay value of the delay model unit into the DLL clock signal and a second phase correction clock signal generated by reflecting an actual delay value of the internal clock path into the DLL clock signal. | 08-25-2011 |
| Patent application number | Description | Published |
|---|
| 20080225609 | VOLTAGE GENERATING CIRCUIT AND REFERENCE VOLTAGE GENERATING CIRCUIT FOR SEMICONDUCTOR MEMORY APPARATUS, AND SEMICONDUCTOR SYSTEM USING THE SAME - A voltage generating circuit for a semiconductor memory apparatus according includes a data logic voltage generating unit that, when a data output unit outside a semiconductor memory apparatus outputs low-level data, generates an internal data logic voltage at the same potential level as the low-level data in response to an on-die termination signal. In addition, a reference voltage generating circuit for a semiconductor memory apparatus that uses the voltage generating circuit includes a reference voltage generating unit that can be configured to generate a reference voltage at an average potential level between a maximum potential and a minimum potential of input data. | 09-18-2008 |
| 20080253201 | APPARATUS AND METHOD FOR CALIBRATING ON-DIE TERMINATION IN SEMICONDUCTOR MEMORY DEVICE - An on-die termination circuit in a semiconductor memory apparatus can comprise a comparing block for comparing a reference voltage with a code voltage corresponding to a code and outputting a comparison signal, a counting block for changing the code based on the comparison signal, and controlling block for controlling the counting block based on a match result of previous and current values of the comparison signal. | 10-16-2008 |
| 20080278192 | DATA OUTPUT DRIVING CIRCUIT FOR A SEMICONDUCTOR APPARATUS - A data output driving circuit for a semiconductor apparatus includes a code converter that varies an input on-die termination code according to a control signal and outputs the code, and a driver block having impedance which can be modified according to the code generated by the code converter. | 11-13-2008 |
| 20090045874 | DIFFERENTIAL AMPLIFIER AND INPUT CIRCUIT USING THE SAME - A differential amplifier comprises a plurality of first switching elements configured to output differentially amplified signals through output terminals when a voltage level of a first input signal and a second input signal belongs to a first range and a plurality of second switching elements configured to output the differentially amplified signals through the output terminals when the voltage level of the first input signal and the second input signal belongs to a second range. | 02-19-2009 |
| 20090146682 | DATA OUTPUT DRIVING CIRCUIT AND METHOD FOR CONTROLLING SLEW RATE THEREOF - A data output driving circuit capable of optimizing a slew rate of data according to the variation of operational conditions and a method for controlling a slew rate thereof includes a slew rate control signal generating unit configured to generate slew rate control signals by using a code signal, and a plurality of drivers configured to output data by driving the data at a slew rate set according to the slew rate control signals. | 06-11-2009 |
| 20090167344 | DATA OUTPUT DRIVING CIRCUIT OF SEMICONDUCTOR APPARATUS - A data output driving circuit for a semiconductor apparatus can include a code multiplier configured to multiply a received first code by a multiplication factor determined in response to a control signal and generating a second code; a signal line configured to transmit the second code; and a plurality of data output drivers commonly connected to the signal line and changed in an impedance thereof in response to the second code. | 07-02-2009 |
| 20100097865 | DATA TRANSMISSION CIRCUIT AND A SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME - A data transmission circuit includes a data input unit configured to latch data in response to a data strobe signal and to output the data as input data, and a data input timing control unit configured to latch the input data in response to the data strobe signal delayed for a predetermined time interval and to output the input data to a bank group as delay data. | 04-22-2010 |
| Patent application number | Description | Published |
|---|
| 20080268316 | Fuel cell stack and manufacturing method thereof - A fuel cell stack and a manufacturing method thereof are disclosed. In one embodiment, the fuel cell stack includes: i) a membrane electrode assembly configured of an anode electrode, a cathode electrode, and a polymer electrolyte membrane positioned therebetween, ii) a first plate including a fuel flow channel facing the anode electrode and contacting the anode electrode and iii) a second plate including an oxidant flow channel facing the cathode electrode and contacting the cathode electrode, wherein the membrane electrode assembly, the first bipolar plate, and the second bipolar plate each includes a stack direction display parts, which are arranged in a line. At least one embodiment of the invention is capable of preventing an anode surface and a cathode surface of a part from being reversely stacked in manufacturing a stack type fuel cell. | 10-30-2008 |
| 20090011287 | High temperature fuel cell stack and fuel cell having the same - In a fuel cell, a fuel cell stack for high temperature comprises: a main body of the fuel cell having an electrolyte membrane, and an anode electrode and a cathode electrode bonded to both sides of the electrolyte membrane for generating electric energy by electro-chemically reacting fuel supplied to the anode electrode and oxidizer supplied to the cathode electrode; and a heater having a chamber attached to the main body of the fuel cell and an oxidation catalyst installed inside the chamber. The heater generates heat by oxidizing fuel supplied to the inside of the chamber, and heats the main body of the fuel cell with the generated heat. According to the present invention, it is possible to significantly reduce the starting time of the main body of the fuel cell, and to easily control a starting temperature of the main body of the fuel cell. | 01-08-2009 |
| 20090123808 | FUEL CELL STACK - The present disclosure relates to a fuel cell stack capable of making fuel flow within the stack uniform. One embodiment of the present disclosure is configured to provide a fuel cell stack comprising: a stack comprising a plurality of fuel cells disposed in a stack body, a fuel manifold in the stack body fluidly connected to the plurality of fuel cells, an oxidant manifold in the stack body fluidly connected to the plurality of fuel cells, and a baffle disposed in the fuel manifold comprising a longitudinal recess wherein a cross-section of the recess reduces in one direction. | 05-14-2009 |
