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Dong-Jin Park
Dong-Jin Park, Daegu KR
| Patent application number | Description | Published |
|---|---|---|
| 20110053660 | MOBILE PHONE CRADLE AND VEHICLE INCLUDING THE SAME - A mobile phone cradle may include a housing, a lower body displaceably received in the housing, an upper body rotatably fixed to an upper portion of the lower body and displaceably received in the housing, wherein a mobile phone is held on the upper body, a first elastic member, wherein one end of the first elastic member is selectively wound around a roller rotatably mounted on the housing to move the lower body upwards and the other end of the elastic member is fixed to the lower body, a fixing member selectively fixing the lower body to the housing, and a moving unit guiding displacement of the lower body along the housing, wherein the upper body is rotated at a predetermined angle when taken out of the housing by the first elastic member. | 03-03-2011 |
Dong-Jin Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080283288 | Printed circuit board using paste bump and manufacturing method thereof - A printed circuit board using paste bumps and manufacturing method thereof are disclosed. The method of manufacturing a printed circuit board using paste bumps, includes: (a) perforating a core board to form at least one via hole, (b) filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, (c) stacking a paste bump board on at least one surface of the core board, and (d) forming an outer layer circuit on a surface of the paste bump board, a structurally stable all-layer IVH structure can be implemented due to increased strength in the BVH's of the plated core boards, the manufacture time can be reduced due to parallel processes and collective stacking, implementing micro circuits can be made easy due to the copper foils of the paste bump boards stacked on the outermost layers, the manufacture costs can be reduced as certain plating and drilling processes may be omitted, the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained. | 11-20-2008 |
| 20090064497 | Printed circuit board using paste bump and manufacturing method thereof - The method of manufacturing a printed circuit board using paste bumps includes perforating a core board to form at least one via hole, filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, stacking a paste bump board on at least one surface of the core board, and forming an outer layer circuit on a surface of the paste bump board. The method provides a structurally stable all-layer IVH structure due to increased strength in the BVH's of the plated core boards and the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained. | 03-12-2009 |
| 20090120660 | Electrical member and method of manufacturing a printed circuit board using the same - An electrical member and a method of manufacturing a printed circuit board using the electrical member are disclosed. The method includes: forming an intaglio groove in an insulation layer, where the intaglio groove has at least one protrusion formed within; stacking a seed layer over the intaglio groove; forming a plating layer by performing electroplating over the seed layer; and forming a circuit pattern, which includes the plating layer filled in the intaglio groove, by removing a portion of the plating layer such that the insulation layer is exposed. | 05-14-2009 |
| 20100022052 | Method for manufacturing package on package with cavity - A manufacturing method of a package on package with a cavity. The method can include forming a first upper substrate cavity in one side of an upper substrate; mounting an upper semiconductor chip on the other side of the upper substrate; forming a lower substrate cavity in one side of a lower substrate; mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate. | 01-28-2010 |
| 20100025092 | Core substrate and multilayer printed circuit board using paste bumps - A core substrate using paste bumps, the core substrate including a first paste bump board having a plurality of first paste bumps joined to a surface thereof; a second paste bump board having a plurality of second paste bumps facing the first paste bumps joined thereto; and an insulation element placed between the first paste bump board and the second paste bump board. In the core substrate, the first paste bumps and the second paste bumps are electrically interconnected. | 02-04-2010 |
Dong-Jin Park, Seongnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090133253 | Method of manufacturing printed circuit board - A method of manufacturing a printed circuit board is disclosed. The method may include: sequentially stacking an acid-resistant first cover layer and an alkali-resistant second cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the second cover layer, the first cover layer, and the copper clad laminate; stacking a seed layer over the intaglio groove and the second cover layer; removing a portion of the seed layer stacked over the second cover layer, by stripping the second cover layer; forming a plating layer, by plating an inside of the intaglio groove; stripping the first cover layer; and removing the copper foil exposed by the stripping of the first cover layer. | 05-28-2009 |
| 20090134118 | Method of manufacturing printed circuit board - A method of manufacturing a printed circuit board is disclosed. The method may include: stacking a cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the cover layer and the copper clad laminate; stacking a seed layer over a surface of the intaglio groove and the cover layer; removing a portion of the seed layer stacked over the cover layer, by removing a portion of the cover layer; forming a plating layer, by plating an inside of the intaglio groove; and removing the remaining cover layer and the copper foil. | 05-28-2009 |
| 20090136656 | Method of manufacturing printed circuit board - A method of manufacturing a printed circuit board is disclosed. The method may include: stacking an anti-plating layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove, by removing a portion of the anti-plating layer and a portion of the copper clad laminate; stacking a seed layer over a surface of the intaglio groove; forming a plating layer, by plating an inside of the intaglio groove; and removing the anti-plating layer and the copper foil. | 05-28-2009 |
Dong-Jin Park, Taegu-Kwangyokshi KR
| Patent application number | Description | Published |
|---|---|---|
| 20080212008 | Array panel for liquid crystal display device and method of manufacturing the same - An array panel for a liquid crystal display device includes a substrate, a gate line and a gate electrode on the substrate, wherein the gate line is connected to the gate electrode, a gate insulating layer on the gate line and the gate electrode, an active layer on the gate insulating layer, an ohmic contact layer on the active layer, a data line, a source electrode, and a drain electrode on the ohmic contact layer, wherein the data line, the source electrode, and the drain electrode are formed of molybdenum, a passivation layer on the data line, the source and drain electrodes, and a pixel electrode on the passivation layer, wherein the ohmic contact layer has the same shape as the data line, the source, and drain electrodes, and the active layer has the same shape as the data line, and the source electrode, and the drain electrode except for a channel area between the source electrode and the drain electrode, and the channel area has a “U” shape. | 09-04-2008 |