Patent application number | Description | Published |
20110187417 | RADIO FREQUENCY SWITCH CIRCUIT - A radio frequency (RF) switch circuit in which an RF switch and a switch controller are formed on a single CMOS substrate and floating resistors are connected to a deep N type well substrate, an N type well substrate, and a P type well substrate to thereby increase linearity with respect to input power. In the RF switch having at least one NMOS (N type Metal Oxide Semiconductor) switch changing a transmission path of an RF signal, an N type terminal formed on a first deep N type well substrate receives driving power through a floating resistor, a P type terminal formed on a first P type substrate receives body power through a floating resistor, and the two N type terminals formed on the first P type substrate receive gate power through a floating resistor, and in the switch controller having at least one NMOS switch and at least one PMOS (P type Metal Oxide Semiconductor) switch controlling changing of a path of the RF switch, an N type terminal formed on a second deep N type well substrate and an N type terminal formed on the first N type substrate receive driving power through floating resistors. | 08-04-2011 |
20110187475 | RADIO FREQUENCY SWITCH CIRCUIT - A radio frequency (RF) switch circuit is disclosed to restrict an input signal input to the RF switch from being transferred to a switch controller when a floating resistor is connected to an NMOS FET and a PMOS FET of the RF switch and the switch controller formed through a standard CMOS (Complementary Metal Oxide Semiconductor) process. The RF switch circuit includes: an RF switch having at least one NMOS (N type Metal Oxide Semiconductor) switch formed on a single chip substrate and changing a transmission path of an RF signal; a switch controller having at least one NMOS switch and PMOS (P type Metal Oxide Semiconductor) formed on the chip substrate and controlling changing of a path of the RF switch; and a limiter having a deep N type well diode formed on the chip substrate and limiting the level of an RF signal transferred from the RF switch to the switch controller, wherein the NMOS switch of the RF signal receives corresponding power through a floating resistor, and the at least one NMOS switch and PNMOS switch of the switch controller receives corresponding power through a floating resistor. | 08-04-2011 |
20120255763 | CARD-TYPE INFORMATION RECORDING MEDIUM HAVING EMBEDDED ANTENNA FOR NEAR FIELD COMMUNICATION AND MANUFACTURING METHOD THEREOF - A card-type information recording medium having an embedded antenna for NFC communication is provided. The card-type information recording medium includes: a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process; an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB; and a molding material that is formed on the top of the PCB to cover the NFC communication unit and the USIM card unit. Accordingly, it is possible to perform functions of NFC and RFID read/tag by only mounting a USIM device thereon without adding any module or any constituent having an antenna function to a mobile terminal. | 10-11-2012 |
20120319671 | POWER GENERATING CIRCUIT AND SWITCHING CIRCUIT - The power generating circuit includes: a first transistor having a control terminal to which a second control signal is applied and one end to which a first control signal is applied; and a second transistor having a control terminal to which the first control signal is applied and one end to which the second control signal is applied, wherein the other ends of the first transistor and the second transistor are connected to an output terminal. | 12-20-2012 |
20120319737 | INVERTER AND SWITCHING CIRCUIT - Disclosed herein are an inverter and an antenna circuit. The inverter that receives control signals, inverts the control signals including a first control signal, a second control signal, and a third control signal, and outputs the inverted control signals, includes: a first MOS transistor having a gate to which a first control signal is applied and a source that is grounded; a second MOS transistor having a gate to which a third control signal is applied and a source to which a second control signal is applied; and a third MOS transistor having a gate to which a second control signal is applied and a source to which a third control signal is applied, wherein drains of the first MOS transistor, the second MOS transistor, and the third MOS transistor are connected to an output terminal. | 12-20-2012 |
20120319773 | POWER GENERATING CIRCUIT AND SWITCHING CIRCUIT - Disclosed herein is a power generating circuit including a first transistor in which a second control signal is applied to a control terminal and a first control signal is applied to one end, and which has the other end connected to an output terminal, a second transistor in which the first control signal is applied to a control terminal and the second control signal is applied to one end, and which has the other end connected to the output terminal a third transistor in which one of the first and the second control signals is applied to a control terminal and which has one end grounded, and a fourth transistor in which the other one thereof is applied to a control terminal and which has one end connected to the other end of the third transistor and the other end connected to the output terminal. | 12-20-2012 |
20130094562 | TRANSMITTER AND TRANSMITTING METHOD USING DELAY LOCKED LOOP - An NFC transmitter using a delay-locked loop and an NFC transmission method thereof are provided. The NFC near field communication (NFC) transmitter includes a delay-locked loop (DLL) that outputs a reference clock and a delayed clock using the reference clock and a value of a duty code which are input, a clock output unit that receives the reference clock and the delayed clock, outputs the reference clock in any of a high section and a low section of input data, and outputs a converted clock having a duty ratio using the reference clock and the delayed clock in the other of the high section and the lower section of the input data, and an RF signal generator that generates an RF signal using a PWM (Pulse Width Modulation) signal input from the clock output unit. | 04-18-2013 |
20130147539 | DOWN-CONVERTER, UP-CONVERTER, RECEIVER AND TRANSMITTER APPLYING THE SAME - A down-frequency conversion circuit and up-frequency conversion circuit, and a receiver and transmitter applying the same are provided. The down-frequency conversion circuit includes a harmonic mixer and general mixer, and thus becomes able to convert frequency using one LO (Local Oscillator) frequency, thereby reducing burden on generating LO frequency. | 06-13-2013 |
20140299667 | CARD-TYPE INFORMATION RECORDING MEDIUM HAVING EMBEDDED ANTENNA FOR NEAR FIELD COMMUNICATION AND MANUFACTURING METHOD THEREOF - A card-type information recording medium including a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process, an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB, and a molding material that is formed on the top of the PCB so as to cover the NFC communication unit and the USIM card unit. | 10-09-2014 |