Patent application number | Description | Published |
20080216087 | AFFINITY DISPATCHING LOAD BALANCER WITH PRECISE CPU CONSUMPTION DATA - A system for distributing a plurality of tasks over a plurality of nodes in a network includes: a plurality of processors for executing tasks; a plurality of nodes comprising processors; a task dispatcher; and a load balancer. The task dispatcher receives as input the plurality of tasks; calculates a task processor consumption value for the tasks; calculates a node processor consumption value for the nodes; calculates a target node processor consumption value for the nodes; and then calculates a load index value as a difference between the calculated node processor consumption for a node i and the target node processor consumption value for the node i. The balancer distributes the tasks among the nodes to balance the processor workload among the nodes according to the calculated load index value of each node, such that the calculated load index value of each node is substantially zero. | 09-04-2008 |
20090182915 | Performing a Configuration Virtual Topology Change and Instruction Therefore - In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU. | 07-16-2009 |
20090216963 | SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PROVIDING A SHARED MEMORY TRANSLATION FACILITY - A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed. | 08-27-2009 |
20090216995 | SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PROVIDING QUIESCE FILTERING FOR SHARED MEMORY - A system, method and computer program product for providing quiesce filtering for shared memory. The method includes receiving a shared-memory quiesce request at a processor. The request includes a donor zone. The processor includes translation look aside buffer one (TLB | 08-27-2009 |
20090234974 | PERFORMANCE COUNTERS FOR VIRTUALIZED NETWORK INTERFACES OF COMMUNICATIONS NETWORKS - Performance counters are provided for virtualized network interfaces of communications networks, while minimizing the use of hardware resources. A virtualized network interface includes physical resources, as well as logical resources. Dedicated performance counters are provided for the physical resources of the virtualized network interface, as well as for logical partitions coupled to that interface, while non-dedicated performance counters are provided for the logical resources. This enables the provision of performance counters for virtualized network interfaces, while minimizing hardware resources consumed by those interfaces. | 09-17-2009 |
20090327658 | COMPARE, SWAP AND STORE FACILITY WITH NO EXTERNAL SERIALIZATION - A compare, swap and store facility is provided that does not require external serialization. A compare and swap operation is performed using an interlocked update operation. If the comparison indicates equality, a store operation is performed. The compare, swap and store operations are performed as a single unit of operation. | 12-31-2009 |
20100088444 | CENTRAL PROCESSING UNIT MEASUREMENT FACILITY - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 04-08-2010 |
20100095033 | PERFORMING A CONFIGURATION VIRTUAL TOPOLOGY CHANGE AND INSTRUCTION THEREFORE - In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU. | 04-15-2010 |
20100223448 | Computer Configuration Virtual Topology Discovery and Instruction Therefore - In a logically partitioned host computer system comprising host processors (host CPUs), a facility and instruction for discovering topology of one or more guest processors (guest CPUs) of a guest configuration comprises a guest processor of the guest configuration fetching and executing a STORE SYSTEM INFORMATION instruction that obtains topology information of the computer configuration. The topology information comprising nesting information of processors of the configuration and the degree of dedication a host processor provides to a corresponding guest processor. The information is preferably stored in a single table in memory. | 09-02-2010 |
20100223612 | VIRTUALIZATION OF STORAGE BUFFERS USED BY ASYNCHRONOUS PROCESSES - The amount of host real storage provided to a large guest storage buffer is controlled. This control is transparent to the guest that owns the buffer and is executing an asynchronous process to update the buffer. The control uses one or more indicators to determine when additional host real storage is to be provided. | 09-02-2010 |
20110029758 | CENTRAL PROCESSING UNIT MEASUREMENT FACILITY - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 02-03-2011 |
20110078419 | SET PROGRAM PARAMETER INSTRUCTION - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 03-31-2011 |
20110113434 | METHOD, SYSTEM, AND STORAGE MEDIUM FOR MANAGING COMPUTER PROCESSING FUNCTIONS - Exemplary embodiments include a system and storage medium for managing computer processing functions in a multi-processor computer environment. The system includes a physical processor, a standard logical processor, an assist logical processor sharing a same logical partition as the standard logical processor, and a single operating system instance associated with the logical partition, the single operating system instance including a switch-to service and a switch-from service. The system also includes a dispatch component managed by the single operating system instance. Upon invoking the switch-to service by standard code, the switch-to service checks to see if an assist logical processor is online and, if so, it updates an integrated assist field of a work element block associated with the task for indicating the task is eligible to be executed on the assist logical processor. The switch-to service also assigns a work queue to the work element block. | 05-12-2011 |
20110246752 | Emulating Execution of An Instruction For Discovering Virtual Topology of a Logical Partitioned Computer System - In a logically partitioned host computer system comprising host processors (host CPUs), a facility and instruction for discovering topology of one or more guest processors (guest CPUs) of a guest configuration comprises a guest processor of the guest configuration fetching and executing a STORE SYSTEM INFORMATION instruction that obtains topology information of the computer configuration. The topology information comprising nesting information of processors of the configuration and the degree of dedication a host processor provides to a corresponding guest processor. The information is preferably stored in a single table in memory. | 10-06-2011 |
20110283280 | Executing an Instruction for Performing a Configuration Virtual Topology Change - In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of quest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU. | 11-17-2011 |
20110320644 | RESIZING ADDRESS SPACES CONCURRENT TO ACCESSING THE ADDRESS SPACES - Address spaces are resized concurrent to accessing those address spaces. The size of an address space can be increased or decreased concurrent to performing read or write operations on the address space. Further, cache entries associated with an address space being decreased in size are purged. | 12-29-2011 |
20110320662 | IDENTIFICATION OF TYPES OF SOURCES OF ADAPTER INTERRUPTIONS - A source identification facility is provided that enables identification of the one or more types of adapters requesting an interrupt in order to facilitate processing of the interrupt. The adapter types are accessible to the operating system and are used to tailor processing by the operating system of the interrupt. | 12-29-2011 |
20110320664 | CONTROLLING A RATE AT WHICH ADAPTER INTERRUPTION REQUESTS ARE PROCESSED - The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions. | 12-29-2011 |
20110320756 | RUNTIME DETERMINATION OF TRANSLATION FORMATS FOR ADAPTER FUNCTIONS - Various address translation formats are available for use in obtaining system memory addresses for use by requestors, such as adapter functions, in accessing system memory. The particular address translation format to be used by a given requestor is pre-registered in a device table entry associated with that requestor. | 12-29-2011 |
20120072915 | Shared Request Grouping in a Computing System - A queuing module is configured to determine the presence of at least one shared request in a request queue, and in the event at least one shared request is determined to be present in the queue; determine the presence of a waiting exclusive request located in the queue after the at least one shared request, and in the event a waiting exclusive request is determined to be located in the queue after the at least one shared request: determine whether grouping a new shared request with the at least one shared request violates a deferral limit of the waiting exclusive request; and, in the event grouping the new shared request with the at least one shared request does not violate the deferral limit of the waiting exclusive request, group the new shared request with the at least one shared request. | 03-22-2012 |
20120089816 | QUERY SAMPLING INFORMATION INSTRUCTION - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 04-12-2012 |
20120198453 | VIRTUALIZATION OF STORAGE BUFFERS USED BY ASYNCHRONOUS PROCESSES - The amount of host real storage provided to a large guest storage buffer is controlled. This control is transparent to the guest that owns the buffer and is executing an asynchronous process to update the buffer. The control uses one or more indicators to determine when additional host real storage is to be provided. | 08-02-2012 |
20130007412 | UNIFIED, WORKLOAD-OPTIMIZED, ADAPTIVE RAS FOR HYBRID SYSTEMS - A method, system, and computer program product for maintaining reliability in a computer system. In an example embodiment, the method includes managing workloads on a first processor with a first processor architecture by an agent process executing on a second processor with a second processor architecture. The method proceeds by activating redundant computation on the second processor by the agent process. The method continues by performing a same computation from a workload of the workloads at least twice. Finally, the method includes comparing results of the same computation. In this embodiment the first processor is coupled the second processor by a network, and the first processor architecture and second processor architecture are different architectures. | 01-03-2013 |
20130007759 | UNIFIED, WORKLOAD-OPTIMIZED, ADAPTIVE RAS FOR HYBRID SYSTEMS - A method, system, and computer program product for maintaining reliability in a computer system. In an example embodiment, the method includes performing a first data computation by a first set of processors, the first set of processors having a first computer processor architecture. The method continues by performing a second data computation by a second processor coupled to the first set of processors, the second processor having a second computer processor architecture, the first computer processor architecture being different than the second computer processor architecture. Finally, the method includes dynamically allocating computational resources of the first set of processors and the second processor based on at least one metric while the first set of processors and the second processor are in operation such that the accuracy and processing speed of the first data computation and the second data computation are optimized. | 01-03-2013 |
20130024659 | Executing An Instruction for Performing a Configuration Virtual Topology Change - In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU. | 01-24-2013 |
20130080561 | USING TRANSMISSION CONTROL PROTOCOL/INTERNET PROTOCOL (TCP/IP) TO SETUP HIGH SPEED OUT OF BAND DATA COMMUNICATION CONNECTIONS - A transport layer connection is established between a first system and a second system. The establishment of the transport layer connection includes identifying a remote direct memory access (RDMA) connection between the first system and the second system. After establishing to transport layer connection, the first and second systems exchange data using the RDMA connection identified in establishing the transport layer connection. | 03-28-2013 |
20130080562 | USING TRANSMISSION CONTROL PROTOCOL/INTERNET PROTOCOL (TCP/IP) TO SETUP HIGH SPEED OUT OF BAND DATA COMMUNICATION CONNECTIONS - A method establishes a transport layer connection between a first system and a second system. The establishment of the transport layer connection includes identifying a remote direct memory access (RDMA) connection between the first system and the second system. After establishing to transport layer connection, the first and second systems exchange data using the RDMA connection identified in establishing the transport layer connection. | 03-28-2013 |
20130097407 | UNIFIED, WORKLOAD-OPTIMIZED, ADAPTIVE RAS FOR HYBRID SYSTEMS - A method, system, and computer program product for maintaining reliability in a computer system. In an example embodiment, the method includes managing workloads on a first processor with a first processor architecture by an agent process executing on a second processor with a second processor architecture. The method proceeds by activating redundant computation on the second processor by the agent process. The method continues by performing a same computation from a workload of the workloads at least twice. Finally, the method includes comparing results of the same computation. In this embodiment the first processor is coupled the second processor by a network, and the first processor architecture and second processor architecture are different architectures. | 04-18-2013 |
20130097611 | UNIFIED, WORKLOAD-OPTIMIZED, ADAPTIVE RAS FOR HYBRID SYSTEMS - A method, system, and computer program product for maintaining reliability in a computer system. In an example embodiment, the method includes performing a first data computation by a first set of processors, the first set of processors having a first computer processor architecture. The method continues by performing a second data computation by a second processor coupled to the first set of processors, the second processor having a second computer processor architecture, the first computer processor architecture being different than the second computer processor architecture. Finally, the method includes dynamically allocating computational resources of the first set of processors and the second processor based on at least one metric while the first set of processors and the second processor are in operation such that the accuracy and processing speed of the first data computation and the second data computation are optimized. | 04-18-2013 |
20130185732 | PROVIDING BY ONE PROGRAM TO ANOTHER PROGRAM ACCESS TO A WARNING TRACK FACILITY - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130185735 | WARNING TRACK INTERRUPTION FACILITY - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130185736 | USE OF A WARNING TRACK INTERRUPTION FACILITY BY A PROGRAM - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130185737 | PROVIDING BY ONE PROGRAM TO ANOTHER PROGRAM ACCESS TO A WARNING TRACK FACILITY - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130185738 | USE OF A WARNING TRACK INTERRUPTION FACILITY BY A PROGRAM - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130185739 | WARNING TRACK INTERRUPTION FACILITY - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 07-18-2013 |
20130191848 | Distributed Function Execution for Hybrid Systems - A system for distributed function execution, the system includes a host in operable communication with an accelerator. The system is configured to perform a method including processing an application by the host and distributing at least a portion of the application to the accelerator for execution. The method also includes instructing the accelerator to create a buffer on the accelerator, instructing the accelerator to execute the portion of the application, wherein the accelerator writes data to the buffer and instructing the accelerator to transmit the data in the buffer to the host before the application requests the data in the buffer. The accelerator aggregates the data in the buffer before transmitting the data to the host based upon one or more runtime conditions in the host. | 07-25-2013 |
20130191849 | DISTRIBUTED FUNCTION EXECUTION FOR HYBRID SYSTEMS - A method includes processing an application by a host including one or more processors and distributing at least a portion of the application to an accelerator for execution. The method includes instructing the accelerator to create a buffer on the accelerator and instructing the accelerator to execute the portion of the application, wherein the accelerator writes data to the buffer. The method also includes instructing the accelerator to transmit the data in the buffer to the host before the application requests the data in the buffer. The accelerator aggregates the data in the buffer before transmitting the data to the host based upon one or more runtime conditions in the host. | 07-25-2013 |
20130311726 | SHARED MEMORY TRANSLATION FACILITY - Aspects include a system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined whether the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations managed in different zones of memory. Based on determining that the memory address refers to the SMO, it is determined whether the configuration has access to the SMO. Based on determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the configuration and the plurality of configurations is allowed. | 11-21-2013 |
20130332696 | SHARED PHYSICAL MEMORY - A computer implemented method for sharing physical memory among logical partitions. A computer reserves physical memory of a Central Electronic Complex (CEC) for communication within the CEC as a shared memory pool. The computer creates a first logical partition using resources of the CEC that are not reserved as the shared memory pool. The computer creates a second logical partition using resources of the CEC that are not reserved as the shared memory pool. The computer creates a virtual local area network (VLAN) having at least two addresses within the CEC. The computer allocates a portion of the shared memory to the VLAN as the shared memory pool. | 12-12-2013 |
20130332709 | SET SAMPLING CONTROLS INSTRUCTION - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 12-12-2013 |
20130339690 | TRANSACTIONAL EXECUTION BRANCH INDICATIONS - Transactional execution branch indications are placed into one or more transaction diagnostic blocks when a transaction is aborted. Each branch indication specifies whether a branch was taken, as a result of executing a branch instruction within the transaction. As the transaction executes and a branch instruction is encountered, a branch indication is set in a vector indicating whether the branch was taken. Then, if the transaction aborts, the indicators are stored in one or more transaction diagnostic blocks providing a branch history usable in diagnosing the failure. | 12-19-2013 |
20130339796 | TRANSACTIONAL EXECUTION BRANCH INDICATIONS - Transactional execution branch indications are placed into one or more transaction diagnostic blocks when a transaction is aborted. Each branch indication specifies whether a branch was taken, as a result of executing a branch instruction within the transaction. As the transaction executes and a branch instruction is encountered, a branch indication is set in a vector indicating whether the branch was taken. Then, if the transaction aborts, the indicators are stored in one or more transaction diagnostic blocks providing a branch history usable in diagnosing the failure. | 12-19-2013 |
20130346792 | RESOLVING MEMORY FAULTS WITH REDUCED PROCESSING IMPACT - A fault occurs in a virtual environment that includes a base space, a first subspace, and a second subspace, each with a virtual address associated with content in auxiliary storage memory. The fault is resolved by copying the content from auxiliary storage to central storage memory and updating one or more base space dynamic address translation (DAT) tables, and not updating DAT tables of the first and second subspace. A subsequent fault at the first subspace virtual address is resolved by copying the base space DAT table information to the first subspace DAT tables and not updating the second subspace DAT tables. A fault occurring with association to the virtual address of the first subspace is resolved for the base space and the base space DAT table information is copied to the first subspace DAT tables, and the second subspace DAT tables are not updated. | 12-26-2013 |
20140237473 | VIRTUALIZATION OF STORAGE BUFFERS USED BY ASYNCHRONOUS PROCESSES - The amount of host real storage provided to a large guest storage buffer is controlled. This control is transparent to the guest that owns the buffer and is executing an asynchronous process to update the buffer. The control uses one or more indicators to determine when additional host real storage is to be provided. | 08-21-2014 |
20140281253 | DYNAMICALLY REMOVING ENTRIES FROM AN EXECUTING QUEUE - According to an embodiment, a computer-implemented method for control block management is provided. The computer-implemented method includes placing one or more control blocks in a queue for execution by a computer hardware device. The computer-implemented method also includes allocating a purge flag in each of the control blocks. The purge flag instructs the computer hardware device to skip execution of the corresponding control block. | 09-18-2014 |
20140281318 | EFFICIENTLY SEARCHING AND MODIFYING A VARIABLE LENGTH QUEUE - Embodiments relate to ensuring that serialization is maintained between separate transactions while searching and/or modifying a variable length queue is provided. An aspect includes searching a queue using a transaction. A first sequence number is retrieved from a queue header and a second sequence number is retrieved from local storage for the transaction. The first sequence number is compared with the second sequence number according to embodiments. The search of the queue is resumed using an address of a next element saved from a previous transaction responsive to the first sequence number matching the second sequence number. The search of the queue is restarted at a first element responsive to the first sequence number not matching the second sequence number. | 09-18-2014 |
20140282506 | ENCAPSULATION OF AN APPLICATION FOR VIRTUALIZATION - Embodiments relate to a computer system comprising a service layer controller. The computer system comprises a ring interface unit configured to provide access to a host system that enables access to a plurality of virtual machines (VMs). The computer system comprises a hardware application configured to be encapsulated by the service layer controller such that the hardware application communicates to the host system via interfaces controlled by the ring interface unit and service layer controller. | 09-18-2014 |
20140317325 | WARNING TRACK INTERRUPTION FACILITY - A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup. | 10-23-2014 |
20140325189 | QUERY SAMPLING INFORMATION INSTRUCTION - A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. | 10-30-2014 |
20140337602 | Execution Of An Instruction For Performing a Configuration Virtual Topology Change - In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization being related to the amount of a host CPU resource provided to a guest CPU. | 11-13-2014 |
20150019580 | EFFICIENTLY SEARCHING AND MODIFYING A VARIABLE LENGTH QUEUE - A method of ensuring that serialization is maintained between separate transactions while searching and/or modifying a variable length queue includes searching a queue using a transaction. A first sequence number is retrieved from a queue header and a second sequence number is retrieved from local storage for the transaction. The first sequence number is compared with the second sequence number according to embodiments. The search of the queue is resumed using an address of a next element saved from a previous transaction responsive to the first sequence number matching the second sequence number. The search of the queue is restarted at a first element responsive to the first sequence number not matching the second sequence number. | 01-15-2015 |
20150026680 | Emulating Execution Of An Instruction For Discovering Virtual Topology Of A Logical Partitioned Computer System - In a logically partitioned host computer system comprising host processors (host CPUs), a facility and instruction for discovering topology of one or more guest processors (guest CPUs) of a guest configuration comprises a guest processor of the guest configuration fetching and executing a STORE SYSTEM INFORMATION instruction that obtains topology information of the computer configuration. The topology information comprising nesting information of processors of the configuration and the degree of dedication a host processor provides to a corresponding guest processor. The information is preferably stored in a single table in memory. | 01-22-2015 |
20150058848 | ENCAPSULATION OF AN APPLICATION FOR VIRTUALIZATION - Embodiments relate to a method for encapsulating a hardware application for virtualization. The method surrounds the hardware application with a service layer controller and ring interfaces. The ring interfaces dictates a virtual function that the hardware application is running. The method controls the hardware application so that the hardware application is reset in between each of a plurality of running jobs. The method tags, by the ring interfaces, each of a plurality of requests with an identifier signifying a virtual function that the respective request belongs to. The method ensures that there are not any outstanding requests following a quiesce of the hardware application. | 02-26-2015 |