Patent application number | Description | Published |
20080224235 | Selectively depositing aluminium in a replacement metal gate process - A method for carrying out a replacement metal gate process comprises providing a transistor in a reactor, wherein the transistor includes a gate stack, removing at least a portion of the gate stack to expose a surface of a barrier layer, causing a temperature of the reactor be less than or equal to 150° C., introducing methylpyrrolidine:alane (MPA) proximate to the surface of the barrier layer, and carrying out a CVD process to deposit aluminum metal on the barrier layer using a bottom-up deposition mechanism. | 09-18-2008 |
20080242012 | High quality silicon oxynitride transition layer for high-k/metal gate transistors - A method for fabricating a high quality silicon oxynitride layer for a high-k/metal gate transistor comprises depositing a high-k dielectric layer on a substrate, depositing a barrier layer on the high-k dielectric layer, wherein the barrier layer includes at least one of nitrogen or oxygen, depositing a capping layer on the barrier layer, and annealing the substrate at a temperature that causes at least a portion of the nitrogen and/or oxygen in the barrier layer to diffuse to an interface between the high-k dielectric layer and the substrate. The diffused nitrogen or oxygen forms a high-quality silicon oxynitride layer at the interface. The high-k dielectric layer, the barrier layer, and the capping layer may then be etched to form a gate stack for use in a high-k/metal gate transistor. The capping layer may be replaced with a metal gate electrode using a replacement metal gate process. | 10-02-2008 |
20090020825 | Forming dual metal complementary metal oxide semiconductor integrated circuits - Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of transistor, but is used to form both the n and p-type transistors. The workfunction of the metal layer may be converted, for example, by ion implantation to make it more suitable for use in forming transistors of the opposite type. | 01-22-2009 |
20090149012 | METHOD OF FORMING A NONPLANAR TRANSISTOR WITH SIDEWALL SPACERS - A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode. | 06-11-2009 |
20100140717 | TUNABLE GATE ELECTRODE WORK FUNCTION MATERIAL FOR TRANSISTOR APPLICATIONS - Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film. | 06-10-2010 |
20110097858 | Transition metal alloys for use as a gate electrode and devices incorporating these alloys - Embodiments of a transition metal alloy having an n-type or p-type work function that does not significantly shift at elevated temperature. The disclosed transition metal alloys may be used as, or form a part of, the gate electrode in a transistor. Methods of forming a gate electrode using these transition metal alloys are also disclosed. | 04-28-2011 |
Patent application number | Description | Published |
20130146945 | FIELD EFFECT TRANSISTOR WITH NARROW BANDGAP SOURCE AND DRAIN REGIONS AND METHOD OF FABRICATION - A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode. | 06-13-2013 |
20130161766 | GATE ELECTRODE HAVING A CAPPING LAYER - A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed. | 06-27-2013 |
20140084398 | PERPENDICULAR MTJ STACKS WITH MAGNETIC ANISOTROPY ENHANCING LAYER AND CRYSTALLIZATION BARRIER LAYER - Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer. | 03-27-2014 |
20140084399 | SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE WITH TOPOGRAPHICALLY SMOOTH ELECTRODE AND METHOD TO FORM SAME - Spin transfer torque memory (STTM) devices with topographically smooth electrodes and methods of fabricating STTM devices with topographically smooth electrodes are described. For example, a material layer stack for a magnetic tunneling junction includes a topographically smooth bottom electrode, a topographically smooth dielectric layer disposed above the bottom electrode, and a free magnetic layer disposed above the topographically smooth dielectric layer. | 03-27-2014 |
20140103456 | FIELD EFFECT TRANSISTOR WITH NARROW BANDGAP SOURCE AND DRAIN REGIONS AND METHOD OF FABRICATION - A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode. | 04-17-2014 |
20140103458 | GATE ELECTRODE HAVING A CAPPING LAYER - A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed. | 04-17-2014 |
20140175575 | PERPENDICULAR SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE WITH ENHANCED STABILITY AND METHOD TO FORM SAME - Perpendicular spin transfer torque memory (STTM) devices with enhanced stability and methods of fabricating perpendicular STTM devices with enhanced stability are described. For example, a material layer stack for a magnetic tunneling junction includes a fixed magnetic layer. A dielectric layer is disposed above the fixed magnetic layer. A free magnetic layer is disposed above the dielectric layer. A conductive oxide material layer is disposed on the free magnetic layer. | 06-26-2014 |
20140175583 | PERPENDICULAR SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE HAVING OFFSET CELLS AND METHOD TO FORM SAME - Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device. | 06-26-2014 |
20140308760 | PERPENDICULAR SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE WITH ENHANCED STABILITY AND METHOD TO FORM SAME - Perpendicular spin transfer torque memory (STTM) devices with enhanced stability and methods of fabricating perpendicular STTM devices with enhanced stability are described. For example, a material layer stack for a magnetic tunneling junction includes a fixed magnetic layer. A dielectric layer is disposed above the fixed magnetic layer. A free magnetic layer is disposed above the dielectric layer. A conductive oxide material layer is disposed on the free magnetic layer. | 10-16-2014 |
20140329337 | PERPENDICULAR SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE HAVING OFFSET CELLS AND METHOD TO FORM SAME - Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device. | 11-06-2014 |
20140349415 | PERPENDICULAR MTJ STACKS WITH MAGNETIC ANISOTROPY ENHANCING LAYER AND CRYSTALLIZATION BARRIER LAYER - Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer. | 11-27-2014 |
20140361363 | FIELD EFFECT TRANSISTOR WITH NARROW BANDGAP SOURCE AND DRAIN REGIONS AND METHOD OF FABRICATION - A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode. | 12-11-2014 |
Patent application number | Description | Published |
20100157519 | PERIPHERAL DEVICE CARRIER - Peripheral device carrier. At least some of the illustrative embodiments are systems including a screen portion with a display device viewable on one surface, a base portion hinged to the screen portion and having a keyboard, a peripheral device carrier mounted at least partially within an internal volume defined by the base portion, and a peripheral coupled within the carrier. The peripheral device carrier includes a top wall and a bottom wall coupled by two side walls, and the walls define a volume with a quadrilateral cross-section. The walls comprise a metallic material, and the walls are seamless along the quadrilateral cross-section. | 06-24-2010 |
20100164959 | RENDERING A VIRTUAL INPUT DEVICE UPON DETECTION OF A FINGER MOVEMENT ACROSS A TOUCH-SENSITIVE DISPLAY - A method comprises a processor detecting a person's finger moving across an unrendered portion of a touch-sensitive display. As a result of detecting the finger moving, the method further comprises the processor causing data to be rendered as a virtual keyboard image on the display. | 07-01-2010 |
20110273832 | Access Door For A Mobile Computing System - An access door for a mobile computing system. At least some of the illustrative embodiments are systems comprising a chassis of a computing system, a peripheral device mounted within the chassis, an access door that at least partially defines a surface of the chassis, the access door has a first orientation that at least partially hides the peripheral device, and a second orientation that exposes at least a portion of the peripheral device, and a communication port on the access door. | 11-10-2011 |
20120106077 | Extruding Material Through A Die To Produce A Computer Chassis - A method that comprises extruding material through a die to produce a notebook computer chassis having multiple sides that encapsulate a volume. | 05-03-2012 |