Dobbie
Blair Dobbie, Roanoke, VA US
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20100302282 | LASER AIMING SPOT DISTINGUISHING METHODS AND APPARATUS - System and methods for distinguishing a laser aiming spot associated with a particular firearm from other laser aiming spots are disclosed. The laser aiming spot may be distinguished by imaging a field of view, the field of view including the laser aiming spot and the other laser aiming spots, identifying the laser aiming spot associated with the particular firearm within the imaged field of view, modifying the imaged field of view to distinguish the identified laser aiming spot from the other laser aiming spots, and displaying the modified imaged field of view. | 12-02-2010 |
Blair Reuben Dobbie, Roanoke, VA US
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20110043616 | SYSTEM AND METHOD FOR DYNAMICALLY ENHANCING DEPTH PERCEPTION IN HEAD BORNE VIDEO SYSTEMS - Systems and methods for viewing image data. The system includes a head borne image source, a controller, an eyepiece lens assembly and a display device. The head borne image source images an object and provides the image data. The controller determines a focus adjustment from a focus position of the head borne image source. The display device receives and displays the image data to a user's eye via the eyepiece lens assembly. A distance between the eyepiece lens assembly and the display device is adjusted based on the focus adjustment responsive to the focus position. | 02-24-2011 |
20140153085 | SYSTEM AND METHOD FOR BINARY FOCUS IN NIGHT VISION DEVICES - Focusing devices and methods for controlling a focal position of an objective lens assembly in a night vision optical device are provided. The focusing device includes an objective lens assembly positioned at a first or second focus position from an imaging device and a binary focus controller, coupled to the objective lens assembly, configured to translate the objective lens assembly relative to the imaging device to either the first or second focus position. The objective lens assembly is translated to either the first or second focus position in response to an orientation of the night vision optical device. | 06-05-2014 |
Brad Dobbie, Cambridge, MA US
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20160140047 | TRANSLATION LOOKASIDE BUFFER MANAGEMENT - Each of multiple translation lookaside buffers (TLBs) is associated with a corresponding processing element. A first TLB invalidation (TLBI) instruction is issued at a first processing element, and sent to a second processing element. An element-specific synchronization instruction is issued at the first processing element. A synchronization command is broadcast, and received at the second processing element. The element-specific synchronization instruction prevents issuance of additional TLBI instructions at the first processing element until an acknowledgement in response to the synchronization command is received at the first processing element. After completion of any TLBI instructions issued at the second processing element before the synchronization command was received, the acknowledgement is sent from the second processing element to the first processing element, indicating that any TLBI instructions issued at the second processing element before the synchronization command was received at the second processing element are complete. | 05-19-2016 |
20160140060 | MANAGING BUFFERED COMMUNICATION BETWEEN SOCKETS - A motherboard includes multiple sockets, each socket configured to accept an integrated circuit. A first integrated circuit in a first socket includes one or more cores and at least one buffer. A second integrated circuit in a second socket includes one or more cores and at least one buffer. Communication circuitry transfers messages to buffers of integrated circuits coupled to different sockets. A first core on the first integrated circuit is configured to send messages corresponding to multiple types of instructions to a second core on the second integrated circuit through the communication circuitry. The buffer of the second integrated circuit is large enough to store a maximum number of instructions of a second type that are allowed to be outstanding from cores on the first integrated circuit at the same time, and still have enough storage space for one or more instructions of a first type. | 05-19-2016 |
20160140061 | MANAGING BUFFERED COMMUNICATION BETWEEN CORES - Communicating among multiple sets of multiples cores includes: buffering messages in first buffer associated with a first set of multiple cores; buffering messages in a second buffer associated with a second set of multiple cores; and transferring messages over communication circuitry from cores not in the first set to the first buffer, and to transferring messages from cores not in the second set to the second buffer. A first core of the first set sends messages corresponding to multiple types of instructions to a second core of the second set through the communication circuitry. The second buffer is large enough to store a maximum number of instructions of a second type that are allowed to be outstanding from cores in the first set at the same time, and still have enough storage space for one or more instructions of a first type. | 05-19-2016 |
Bradley D. Dobbie, Boston, MA US
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20130111073 | NETWORK PROCESSOR WITH DISTRIBUTED TRACE BUFFERS | 05-02-2013 |
20130111141 | MULTI-CORE INTERCONNECT IN A NETWORK PROCESSOR | 05-02-2013 |
Bradley D. Dobbie, Cambridge, MA US
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20150254182 | MULTI-CORE NETWORK PROCESSOR INTERCONNECT WITH MULTI-NODE CONNECTION - According to at least one example embodiment, a method of data coherence is employed within a multi-chip system to enforce cache coherence between chip devices of the multi-node system. According at least one example embodiment, a message is received by a first chip device of the multiple chip devices from a second chip device of the multiple chip devices. The message triggers invalidation of one or more copies, if any, of a data block. The data block stored in a memory attached to, or residing in, the first chip device. Upon determining that one or more remote copies of the data block are stored in one or more other chip devices, other than the first chip device, the first chip device sends one or more invalidation requests to the one or more other chip devices for invalidating the one or more remote copies of the data block. | 09-10-2015 |
Charlie Dobbie, Bonn DE
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20120310979 | DISTRIBUTED ARCHITECTURE FOR PAPERWORK IMAGING - The present invention provides a method and system for storage of data files, comprising notifying at least one local reference storage about storing and/or deleting a data file on a central data repository, depositing a reference element on the at least one local reference storage after notifying, requesting a deposited reference element from the local reference storage for demanding a data file contained in the central data repository, retrieving the demanded data file on submitting the reference element to the central data repository. | 12-06-2012 |
James Dobbie, Bellshill GB
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20130280340 | Compositions and methods of using lamellar bodies for modifying linear biological macromolecules - Compositions comprising therapeutically effective amounts of lamellar bodies to restore lubricity and non-stick properties to mucous surfaces for conditions characterised by dry adherent surfaces, particularly those surfaces close to the body openings and conditions of the eye. | 10-24-2013 |
James Dobbie, Lanarkshire GB
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20090111773 | Compositions and methods of using lamellar bodies for modifying linear biological macromolecules - Compositions comprising therapeutically effective amounts of lamellar bodies for the modification of linear macromolecules are disclosed. These lamellar compositions are useful in the treatment of conditions or diseases characterized by a preponderance of heavy mucous secretions, such as otitis media, cystic fibrosis, bronchitis, sinusitis and nasal congestion. Methods of treating these diseases and conditions by administering a therapeutically effective amount of a composition to a patient requiring such treatment are also disclosed. | 04-30-2009 |
Jane Dobbie, Exeter, NH US
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20080289779 | Freestanding window treatment support - A freestanding window treatment support has a base, a lower vertical member having a lower vertical member first end and a lower vertical member second end, the lower vertical member first end connected to and extending vertically from the base, an upper vertical member having an upper vertical member first end and an upper vertical member second end, the upper vertical member first end connected to the lower vertical member second end, and an upper horizontal member connected adjacent the upper vertical member second end where the base has sufficient weight and footprint area for supporting a window treatment. | 11-27-2008 |