Patent application number | Description | Published |
20130075768 | Organic Light Emitting Diode Display Device and Method of Fabricating the Same - In an organic light emitting diode (OLED) display device and a method for fabricating the same, OLED pixels are patterned through a photolithography process, so a large area patterning can be performed and a fine pitch can be obtained, and an organic compound layer can be protected by forming a buffer layer of a metal oxide on an upper portion of the organic compound layer or patterning the organic compound layer by using a cathode as a mask, improving device efficiency. In addition, among red, green, and blue pixels, two pixels are patterned through a lift-off process and the other remaining one is deposited to be formed without patterning, the process can be simplified and efficiency can be increased. | 03-28-2013 |
20150188098 | Organic Light Emitting Diode Display Device and Method of Fabricating the Same - In an organic light emitting diode (OLED) display device and a method for fabricating the same, OLED pixels are patterned through a photolithography process, so a large area patterning can be performed and a fine pitch can be obtained, and an organic compound layer can be protected by forming a buffer layer of a metal oxide on an upper portion of the organic compound layer or patterning the organic compound layer by using a cathode as a mask, improving device efficiency. In addition, among red, green, and blue pixels, two pixels are patterned through a lift-off process and the other remaining one is deposited to be formed without patterning, the process can be simplified and efficiency can be increased. | 07-02-2015 |
20150318507 | ORGANIC LIGHT EMITTING DISPLAY DEVICE - An organic light emitting display element includes a substrate, a lower electrode positioned on the substrate, at least one organic light emitting layer positioned on the lower electrode, a metal doped layer positioned on the organic light emitting layer, and an upper electrode positioned on the metal doped layer that includes a conductive material, and is configured to transmit light. Such organic light emitting display element is capable of minimizing degeneration and damage to the organic light emitting layer caused by sputtering. | 11-05-2015 |
Patent application number | Description | Published |
20090140426 | FLIP CHIP PACKAGE AND METHOD FOR MANUFACTURING THE SAME - A flip chip package includes a substrate and a semiconductor chip. The substrate includes a substrate body, a metal wiring having a terminal part some of which is disposed in the substrate body, a solder resist pattern formed on the substrate body with an opening for exposing the terminal part, and an organic anti-oxidation layer for covering the terminal part. The semiconductor chip has a bump formed through (e.g., penetrates) the organic anti-oxidation layer and is electrically connected to the terminal part. The present invention prevents oxidation of the terminal part and allows easy coupling of a bump of a semiconductor chip and the terminal part of the substrate, since an anti-oxidation layer including an organic matter is formed over a surface of a terminal part including copper which is easily oxidized. | 06-04-2009 |
20100092718 | WAFER MOUNT TAPE, WAFER PROCESSING APPARATUS AND METHOD OF USING THE SAME FOR USE IN THINNING WAFERS - A wafer mount tape, a wafer processing apparatus and an associated method of using the wafer mount tape for use in wafer thinning operations is presented. The wafer mount tape includes a tape body, a first adhesive member and a second adhesive member. The tape body has a first region, a second region and a third region. The first region of the tape body is for being disposed onto a wafer. The second region of the tape body is defined along a periphery of the first region. The third region of the tape body is defined along a periphery of the second region. The first adhesive member is disposed at the first region. The second adhesive member is disposed at the third region. | 04-15-2010 |
20110189928 | WAFER MOUNT TAPE, WAFER PROCESSING APPARATUS AND METHOD OF USING THE SAME FOR USE IN THINNING WAFERS - A wafer mount tape, a wafer processing apparatus and an associated method of using the wafer mount tape for use in wafer thinning operations is presented. The wafer mount tape includes a tape body, a first adhesive member and a second adhesive member. The tape body has a first region, a second region and a third region. The first region of the tape body is for being disposed onto a wafer. The second region of the tape body is defined along a periphery of the first region. The third region of the tape body is defined along a periphery of the second region. The first adhesive is member is disposed at the first region. The second adhesive member is disposed at the third region. | 08-04-2011 |
Patent application number | Description | Published |
20090039333 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having a bar-type active region and an N-type impurity region formed in a surface of the active region. A first insulation layer is formed on the silicon substrate, and the first insulation layer includes a plurality of first contact holes and second contact holes. PN diodes are formed in the first contact holes. Heat sinks are formed in the first contact holes on the PN diodes, and contact plugs fill the second contact holes. A second insulation layer having third contact holes is formed on the first insulation layer. Heaters fill the third contact holes. A stack pattern of a phase change layer and a top electrode is formed to contact the heaters. The heat sink quickly cools heat transferred from the heater to the phase change layer. | 02-12-2009 |
20100296338 | NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME - A nonvolatile memory cell is able to reduce the size per the unit area by employing a dual gate structure where the chalcogenide compound is used for a channel. The nonvolatile memory cell includes a phase-change layer, a first and a second gate that are in contact with sides of the phase-change layer to face each other across the phase-change layer and control a current flowing through the phase-change layer by each gate being arranged to induce the phase transition of the phase-change layer independently of the other. | 11-25-2010 |
20130037874 | NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME - A nonvolatile memory cell is able to reduce the size per the unit area by employing a dual gate structure where the chalcogenide compound is used for a channel. The nonvolatile memory cell includes a phase-change layer, a first and a second gate that are in contact with sides of the phase-change layer to face each other across the phase-in change layer and control a current flowing through the phase-change layer by each gate being arranged to induce the phase transition of the phase-change layer independently of the other. | 02-14-2013 |
20130039123 | NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME - A nonvolatile memory cell is able to reduce the size per the unit area by employing a dual gate structure where the chalcogenide compound is used for a channel. The nonvolatile memory cell includes a phase-change layer, a first and a second gate that are in contact with sides of the phase-change layer to face each other across the phase-in change layer and control a current flowing through the phase-change layer by each gate being arranged to induce the phase transition of the phase-change layer independently of the other. | 02-14-2013 |
20130043456 | NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING THE SAME - A nonvolatile memory cell is able to reduce the size per the unit area by employing a dual gate structure where the chalcogenide compound is used for a channel. The nonvolatile memory cell includes a phase-change layer, a first and a second gate that are in contact with sides of the phase-change layer to face each other across the phase-in change layer and control a current flowing through the phase-change layer by each gate being arranged to induce the phase transition of the phase-change layer independently of the other. | 02-21-2013 |
20140160839 | SEMICONDUCTOR INTERGRATED CIRCUIT DEVICE, METHOD OF MANUFACTURING THE SAME, AND METHOD OF DRIVING THE SAME - A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode. | 06-12-2014 |
20140162429 | SEMICONDUCTOR INTERGRATED CIRCUIT DEVICE, METHOD OF MANUFACTURING THE SAME, AND METHOD OF DRIVING THE SAME - A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode. | 06-12-2014 |
Patent application number | Description | Published |
20150118266 | COMPOSITION FOR PREVENTING, IMPROVING, OR TREATING IMMUNE DISEASES COMPRISING NATURAL EXTRACTS AS ACTIVE INGREDIENTS - The present invention provides a composition for preventing, improving, or treating Th1-mediated immune diseases or Th2-mediated immune diseases, an antihistamine composition, and an anti-inflammatory composition. The present invention provides a method for preventing, improving, or treating Th1-mediated immune diseases or Th2-mediated immune diseases, a method for inhibiting the release of histamine, and a method for preventing, improving, or treating inflammatory disorders. The composition according to the present invention has excellent inhibitory activities for IL-4 generation, the degranulation of mast cells, COX-2, 15-NOX, and the passing of allergens from through an intestinal epithelial cell layer, or an excellent Treg cell inducing activity. Further, the present invention provides a detailed mechanism of action of a natural substance and a food-drived antiallergenic substance, and provides stability, a reduction in production costs, and improved convenience of use by using a natural substance as a material. | 04-30-2015 |
Patent application number | Description | Published |
20090011705 | DATA TRANSMISSION SYSTEM FOR ASYNCHRONOUS TRANSMITTING DATA AND MAP INFORMATION - A relay including a receiver to receive from a base station, data, a first data frame, and a second data frame, the first data frame includes data and data transmission time information associated with the data, and the second data frame includes map information corresponding to the data and map information transmission time information associated with the map information; a data frame computation unit to compute a third data frame and a fourth data frame, wherein the third data frame is used to transmit the data to a terminal and the fourth data frame is used to transmit the map information to the terminal; and a transmitter to transmit the data to the terminal using the map information when the third data frame is the same as the fourth data frame. | 01-08-2009 |
20090022082 | RELAY FOR DETECTING ERROR IN ASYNCHRONOUSLY RECEIVED DATA AND MAP INFORMATION - A relay to transmit data received from a transmitter to a receiver includes a reception unit to receive a first data frame including first data and a second data frame including first MAP information transmitted from a transmitter, and a determination unit to determine whether the received first data and first MAP information correspond to each other, and to determine that the reception unit has failed to receive second MAP information corresponding to the first data and second data corresponding to the first MAP information when the received first data and the first MAP information do not correspond to each other. | 01-22-2009 |
20090093266 | RELAY SYSTEM AND DATA FRAME STRUCTURE FOR THE RELAY SYSTEM - A structure of a data frame for transmitting data via a relay, and a transmission apparatus and a relay using the data frame are provided. The relay includes: a receiver to receive, from a transmission apparatus, first radio resource allocation information with respect to a first radio resource and second radio resource allocation information with respect to a second radio resource, and to receive first data from the transmission apparatus using the first radio resource allocation information; and a transmitter to transmit the received first data to a receiving apparatus using the second radio resource allocation information. | 04-09-2009 |
20120026918 | METHOD AND SYSTEM OF MANAGING NEIGHBOR RELATION TABLE IN WIRELESS COMMUNICATION SYSTEM HAVING SELF-ORGANIZING NETWORK FUNCTION - Provided is a method of managing a neighbor relation table by a base station in a wireless communication system having a self-organizing network function, which includes receiving a neighbor base station report from a terminal; comparing the neighbor base station report with a stored neighbor relation table; calculating a statistic value of a new base station when the new base station is present in the comparison step; and adding the new base station to the stored neighbor relation table when the statistic value is equal to or greater than a first reference value. | 02-02-2012 |
Patent application number | Description | Published |
20090315840 | Liquid crystal display - A liquid crystal display is disclosed. The liquid crystal display includes a liquid crystal display panel including a pixel array and touch sensors, a transparent conductive layer on one substrate of the liquid crystal display panel transmitting display light, a polarizing plate on the transparent conductive layer, a driving voltage supply circuit, and a signal transmitting unit electrically connecting the transparent conductive layer to the driving voltage supply circuit. A portion of the transparent conductive layer is connected to a ground level voltage source. The driving voltage supply circuit generates a driving voltage required to perform light sensing operations of the touch sensors during a touch period based on changes in an amount of surface charge of the transparent conductive layer depending on whether or not the polarizing plate is touched. | 12-24-2009 |
20120206411 | LIQUID CRYSTAL DISPLAY - A liquid crystal display is disclosed. The liquid crystal display includes a liquid crystal display panel including a pixel array and touch sensors, a transparent conductive layer on one substrate of the liquid crystal display panel transmitting display light, a polarizing plate on the transparent conductive layer, a driving voltage supply circuit, and a signal transmitting unit electrically connecting the transparent conductive layer to the driving voltage supply circuit. A portion of the transparent conductive layer is connected to a ground level voltage source. The driving voltage supply circuit generates a driving voltage required to perform light sensing operations of the touch sensors during a touch period based on changes in an amount of surface charge of the transparent conductive layer depending on whether or not the polarizing plate is touched. | 08-16-2012 |
20120206412 | LIQUID CRYSTAL DISPLAY - A liquid crystal display is disclosed. The liquid crystal display includes a liquid crystal display panel including a pixel array and touch sensors, a transparent conductive layer on one substrate of the liquid crystal display panel transmitting display light, a polarizing plate on the transparent conductive layer, a driving voltage supply circuit, and a signal transmitting unit electrically connecting the transparent conductive layer to the driving voltage supply circuit. A portion of the transparent conductive layer is connected to a ground level voltage source. The driving voltage supply circuit generates a driving voltage required to perform light sensing operations of the touch sensors during a touch period based on changes in an amount of surface charge of the transparent conductive layer depending on whether or not the polarizing plate is touched. | 08-16-2012 |
Patent application number | Description | Published |
20130203949 | GROUP 4 METAL COMPOUND CONTAINING THIOPHENE-FUSED CYCLOPENTADIENYL LIGAND DERIVED FROM TETRAQUINOLINE DERIVATIVE AND OLEFIN POLYMERIZATION USING THE SAME - The present invention relates to a novel ligand derived from a tetrahydroquinoline derivative, and a transition metal compound prepared using the ligand, where an amido ligand is linked to an ortho-phenylene ligand to form a condensed ring and a 5-membered cyclic pi-ligand linked to the ortho-phenylene ligand is fused with a heterocyclic thiophene ligand. Compared with the catalysts not fused with a heterocyclic thiophene ligand, the transition metal compound of the present invention as activated with a co-catalyst has higher catalytic activity in olefin polymerization and provides a polymer with higher molecular weight. | 08-08-2013 |
20130211020 | CATALYST COMPOSITION FOR OLEFIN POLYMERIZATION AND PREPARATION METHOD FOR POLYOLEFIN USING THE SAME - The present invention relates to a catalyst composition comprising a novel transition metal compound and a preparation method for polyolefin using the same. The catalyst composition of the present invention has high catalytic activity for polymerization of olefin-based monomers and enables it to control the fine-structure characteristics of the polyolefin, such as molecular weight distribution, in a wide range, thereby easily providing a polyolefin with desired properties. | 08-15-2013 |
20130211021 | METHOD FOR PREPARING POLYPROPYLENE USING TRANSITION METAL COMPOUND CONTAINING THIOPHENE-FUSED CYCLOPENTADIENYL LIGAND - The present invention relates to a preparation method for polypropylene that comprises polymerizing a propylene monomer in the presence of a catalyst comprising a novel transition metal compound. Using the novel transition metal compound as a catalyst, the preparation method for polypropylene according to the present invention can not only acquire high catalytic activity for polymerization to achieve high efficiency of the process but allow it to easily control the fine-structure characteristics of the polymer, thereby providing polypropylene having desired properties with ease. | 08-15-2013 |
20130211024 | METHOD FOR PREPARING OLEFIN-DIENE COPOLYMER USING TRANSITION METAL COMPOUND CONTAINING THIOPHENE-FUSED CYCLOPENTADIENYL LIGAND - The present invention relates to a preparation method for olefin-diene copolymer that comprises polymerizing at least one olefin-based monomer and at least one diene-based monomer in the presence of a catalyst comprising a novel transition metal compound. Using the novel transition metal compound as a catalyst, the preparation method for olefin-diene copolymer according to the present invention can not only acquire high catalytic activity for copolymerization of the olefin and diene monomers to achieve high process efficiency but allow it to easily control the fine-structure characteristics of the copolymer, thereby providing an olefin-diene copolymer having desired properties with ease. | 08-15-2013 |
Patent application number | Description | Published |
20140131856 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Provided are a semiconductor device including an interposer having a relatively thin thickness without a through silicon via and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an interposer including a redistribution layer and a dielectric layer on a dummy substrate, connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer, encapsulating the semiconductor die by using an encapsulation, removing the dummy substrate from the interposer, and connecting a bump to the redistribution layer facing a lower portion of the interposer. | 05-15-2014 |
20140138817 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer. | 05-22-2014 |
20150014830 | SEMICONDUCTOR DEVICE UTILZING REDISTRIBUTION LAYERS TO COUPLE STACKED DIE - A semiconductor device utilizing redistribution layers to couple stacked die is disclosed and may include a first semiconductor die with a first surface comprising bond pads, a second surface opposite the first surface, and sloped side surfaces between the first and second surfaces, such that a cross-section of the first die is trapezoidal in shape. A second semiconductor die with a first surface may be bonded to the second surface of the first die, wherein the first surface of the second die may comprise bond pads. A passivation layer may be formed on the first surface and sloped side surfaces of the first die and the first surface of the second die. A redistribution layer may be formed on the passivation layer, electrically coupling bond pads on the first and second die. A conductive pillar may extend from a bond pad on the second die to the second redistribution layer. | 01-15-2015 |
20150021767 | SEMICONDUCTOR DEVICE WITH PLATED CONDUCTIVE PILLAR COUPLING - A semiconductor device with plated conductive pillar coupling is disclosed and may include a semiconductor die comprising a conductive pillar formed on a bond pad on the die, a substrate comprising an insulating layer with conductive patterns formed on a first surface of the substrate and a second surface opposite to the first surface, and a plating layer electrically coupling the conductive pillar and the bond pad on the first surface of the die to the conductive pattern on the first surface of the substrate. The conductive pillar, the conductive patterns, and the plating layer may comprise copper. The plating layer may fill a void between the copper pillar and the conductive pattern on the first surface of the substrate. The substrate may comprise a rigid circuit board, a flexible circuit board, a ceramic substrate, a semiconductor die, or semiconductor wafer. | 01-22-2015 |
20150200179 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Provided are a semiconductor device including an interposer having a relatively thin thickness without a through silicon via and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an interposer including a redistribution layer and a dielectric layer on a dummy substrate, connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer, encapsulating the semiconductor die by using an encapsulation, removing the dummy substrate from the interposer, and connecting a bump to the redistribution layer facing a lower portion of the interposer. | 07-16-2015 |
20150206807 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise connection verification for a first one or more mounted components prior to additional assembly. | 07-23-2015 |
20150255426 | SEMICONDUCTOR DEVICE WITH REDUCED WARPAGE - A semiconductor device with reduced warpage is disclosed and may, for example, include bonding at least two semiconductor die to a substrate, forming underfill material between the at least two semiconductor die and the substrate and between the at least two semiconductor die, and removing a portion of the underfill material between the at least two semiconductor die, thereby forming a groove. The at least two semiconductor die and the underfill material may, for example, be encapsulating utilizing an encapsulant. The groove may, for example, be filled using the encapsulant. The underfill material between the at least two semiconductor die may, for example, be removed utilizing laser etching. The underfill material between the at least two semiconductor die may, for example, be removed to a depth of 60-70% of a thickness of the at least two semiconductor die. | 09-10-2015 |
20150262945 | Semiconductor Device Utilizing Redistribution Layers To Couple Stacked Die - A method for a semiconductor device utilizing redistribution layers to couple stacked die is disclosed and may include bonding a first semiconductor die to a second semiconductor die, the first semiconductor die having a first surface comprising bond pads, a second surface opposite the first surface that is bonded to a first surface of the second semiconductor die, and sloped sides surfaces between the first and second surfaces of the first semiconductor die, such that a cross-section of the first semiconductor die is trapezoidal in shape. A passivation layer may be formed on the first surface and sloped side surfaces of the first semiconductor die and the first surface of the second semiconductor die. A redistribution layer may be formed on the passivation layer formed on the first surface and sloped side surfaces of the first semiconductor die and the first surface of the second semiconductor die. | 09-17-2015 |