Patent application number | Description | Published |
20090152526 | Method for manufacturing a memory element comprising a resistivity-switching NiO layer and devices obtained thereof - The present disclosure is related to non-volatile memory devices comprising a reversible resistivity-switching layer used for storing data. The resistivity of this layer can be varied between at least two stable resistivity states such that at least one bit can be stored therein. In particular this resistivity-switching layer is a metal oxide or a metal nitride. A resistivity-switching non-volatile memory element includes a resistivity-switching metal-oxide layer sandwiched between a top electrode and a bottom electrode. The resistivity-switching metal-oxide layer has a gradient of oxygen over its thickness. The gradient is formed in a thermal oxidation step. Set and reset voltages can be tuned by using different oxygen gradients. | 06-18-2009 |
20100072531 | Method for Forming a Memory Cell Comprising a Capacitor Having a Strontium Titaniumoxide Based Dielectric Layer and Devices Obtained Thereof - A method is disclosed for manufacturing Sr | 03-25-2010 |
20100155687 | METHOD FOR MANUFACTURING A RESISTIVE SWITCHING MEMORY DEVICE AND DEVICES OBTAINED THEREOF - A method for manufacturing a resistive switching memory device comprises providing a substrate comprising an electrical contact, providing on the substrate a dielectric layer comprising a trench exposing the electrical contact, and providing in the trench at least the bottom electrode and the resistive switching element of the resistive memory device. The method may furthermore comprise providing a top electrode at least on or in the trench, in contact with the resistive switching element. The present invention also provides corresponding resistive switching memory devices. | 06-24-2010 |
20110044089 | Method for Manufacturing a Resistive Switching Memory Cell Comprising a Nickel Oxide Layer Operable at Low-Power and Memory Cells Obtained Thereof - A resistive switching non-volatile memory element is disclosed comprising a resistive switching metal-oxide layer sandwiched between and in contact with a top electrode and a bottom electrode, the resistive switching metal oxide layer having a substantial isotropic non-stoichiometric metal-to-oxygen ratio. For example, the memory element may comprise a nickel oxide resistive switching layer sandwiched between and in contact with a nickel top electrode and a nickel bottom electrode whereby the ratio oxygen-to-nickel of the nickel oxide layer is between 0 and 0.85. | 02-24-2011 |
20130161583 | Stacked RRAM Array With Integrated Transistor Selector - The present invention provides a resistive memory array arranged in a 3D stack comprising a plurality of resistivity switching memory elements laid out in an array in a first and second direction, and stacked in a third direction, a plurality of first electrodes and a plurality of second electrodes extending in the first direction, each first electrode and each second electrode being associated with the at least one resistivity switching memory element, and a plurality of transistor devices, each transistor device being electrically coupled to one of the resistivity switching memory elements, an inversion or accumulation channel of a transistor device being adapted for forming a switchable resistivity path in the third direction, between the electrically coupled resistivity switching memory element and the associated second electrode, wherein the memory array furthermore comprises at least one third electrode provided in a trench through the stack. | 06-27-2013 |
Patent application number | Description | Published |
20080265237 | Phase-Change Memory Cell Having Two Insulated Regions - A phase-change-memory cell is provided which comprises two insulated regions formed in a first phase-change material connected by a region formed in a second phase-change material. The crystallization temperature of the second phase-change material is below the crystallization temperature of the first phase-change material. By locally changing the material properties using a second PCM material, which switches phase at a lower temperature, a localized “hot spot” is obtained. | 10-30-2008 |
20100090192 | METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF - For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing. | 04-15-2010 |
20100127233 | METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF - The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate ( | 05-27-2010 |
20100202193 | NON-VOLATILE MEMORY DEVICE - A memory device comprises an array of memory cells for storing data and a voltage application unit for applying voltages to the cells for writing data to the cells. Each memory cell has a first layer comprising copper in contact with a second layer comprising a chalcogenide material. The voltage application unit is arranged to write data by switching each cell between a first resistance state and a second, lower, resistance state. The voltage application unit is arranged to switch a cell to the first resistance state by applying a potential difference across the first and second layers such that the potential at the first layer is higher than the potential at the second layer by 0.5 volts or less. The voltage application unit is arranged to switch a cell to the second resistance state by applying a potential difference across the first and second layers such that the potential at the second layer is higher than the potential at the first layer by 0.5 volts or less. The current flow when switching between resistance states is less than 10 μA. The memory cells of the device can be toggled between the resistance states, and the resistance states are non-volatile. | 08-12-2010 |