| Patent application number | Description | Published |
|---|
| 20090067487 | INCREASING PWM RESOLUTION BY MODULATION - A method for generating a pulse width modulated (PWM) signal includes determining a PWM period and/or a pulse width of the pulse width modulated signal by counting the number of clock cycles of a reference clock signal and by switching the pulse width modulated signal when a predetermined number of clock cycles is reached. The reference clock signal comprises clock cycles of at least a first clock period and a second clock period. The first clock period and the second clock period differ by an amount of time, which is substantially smaller than both half of the first clock period and half of the second clock period. | 03-12-2009 |
| 20090284295 | Timer for Low-Power and High-Resolution - The present invention is an electronic device comprising a counter driven by an input clock signal for counting clock cycles and providing a count. A clock signal generating stage provides a first set of phase shifted clock signals having m different phases. The electronic device determines n least significant bits of the count of the counter from the logic states of the first set of m phase shifted clock signals. | 11-19-2009 |
| 20090289665 | Comparator - An electronic device compares a first voltage with a selected first reference voltage or second reference voltage. The electronic device includes a comparator having a first input receiving the first voltage, a second input receiving the selected reference voltage and an output providing an output signal based on a comparison. A control stage connected to the output of the comparator generates a control signal based on the output of the comparator. The electronic device selects either the first reference voltage or the second reference voltage in response to the control signal thus comparing the first voltage with the selected reference voltage. | 11-26-2009 |
| 20100176859 | Self-Protecting Core System - The present invention is applicable to an electronic device including a master, a slave, a bus coupling the master and the slave and a clock generator for providing a system clock to the master and slave. The clock generator determines whether the received data is correct on a cycle-by-cycle basis. The clock generator suppresses an edge of a next clock cycle of the system clock signal if the data is not to be correct. The clock generator allows the edge of a next clock cycle of the system clock signal if the data is correct. | 07-15-2010 |
| 20100191979 | Apparatus and Method with Controlled Switch Method - An embedded microcontroller system comprises a central processing unit, a system controller for receiving and handling an interrupt, a register having storage locations containing sets of predefined system data for different operating conditions of the system assigned to the interrupts coupled to set a system configuration. The system data in the register is defined and stored before receipt of an interrupt. On receipt of an interrupt the system controller transmits a selection signal to the register. The register selects a predefined storage location assigned to the received interrupt. The corresponding system configuration data is used to control system configuration of the embedded microcontroller system, such as allocation of CPU time to virtual CPUs and selection of clock frequency or power voltage for modules. | 07-29-2010 |
| 20100235698 | JTAG Mailbox - An electronic device comprises a processing stage, a JTAG port including a test data input pin (TDI), a test data output pin (TDO), a test mode select pin (TMS), a test clock pin (TCK), and a test access port (TAP) controller having a data register (DR) shift state and an instruction register shift (IR) state. The electronic device operates in a scan event mode automatically mapped an incoming event to the TDO pin. | 09-16-2010 |
