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Di Iorio
Ercole Di Iorio, Scurcola Marsicana IT
| Patent application number | Description | Published |
|---|---|---|
| 20100128534 | Word Line Voltage Boost System and Method for Non-Volatile Memory Devices and Memory Devices and Processor-Based System Using Same - The voltage of a selected word line is increased beyond the voltage to which a respective string driver transistor is capable of driving the word line by capacitively coupling a voltage to the selected word line from adjacent word lines. The voltage is capacitively coupled to the selected word line by increasing the voltages of the adjacent word lines after a programming voltage has been applied to a string driver transistor for the selected word line and after a string driver voltage has been applied to the gates of all of the string driver transistors in an array. | 05-27-2010 |
Ercole Rosario Di Iorio, Scurcola Marsicana IT
| Patent application number | Description | Published |
|---|---|---|
| 20100027340 | PATTERN DEPENDENT STRING RESISTANCE COMPENSATION - Pattern dependent string resistance compensation of a memory device is generally described. In one example, an electronic device includes a first string of memory cells and a first bit line coupled with the first string of memory cells wherein a memory cell of the first string of memory cells is read, in part, by pre-charging the first bit line through the first string of memory cells to compensate for resistance of unselected cells in the first string of memory cells. | 02-04-2010 |
| 20100031096 | INTERNAL FAIL BIT OR BYTE COUNTER - Briefly, in accordance with one or more embodiments, an internal fail byte counter is disclosed. | 02-04-2010 |
| 20100080064 | BIT LINE BIAS FOR PROGRAMMING A MEMORY DEVICE - Bit line bias for programming a memory device is generally described. In one example, circuitry for bit line bias programming comprises a word line, one or more bit lines coupled with the word line, and one or more cells to be programmed to a target threshold voltage coupled with the word line and the one or more bit lines wherein a program speed of the one or more cells is increased by selectively pre-charging the one or more bit lines such that a single program pulse raises individual threshold voltages of the one or more cells to or above the target threshold voltage. | 04-01-2010 |
| 20110141822 | Source Bias Shift for Multilevel Memories - The threshold voltage range of a multilevel memory cell may be increased without using a negative voltage pump. In one embodiment, an added positive voltage may be applied to the source of the selected cell. A boost voltage may be applied to the output of a sense amplifier. Non-ideal characteristics of a buffer that supplies the voltage to the selected cell may be compensated for in some embodiments. | 06-16-2011 |
Paolo Di Iorio, San Nicole La Strada IT
| Patent application number | Description | Published |
|---|---|---|
| 20100324842 | METHOD AND APPARATUS FOR DETECTING POSSIBLE CORRELATIONS BETWEEN SIGNAL PATTERNS - A method for detecting possible correlations between signal patterns of a power signal used by an electronic device during execution of operations, including setting couples of windows including respective pairs of sequences of the sampling values. The method includes computing values of correlations between the respective pairs of sequences. Each values may be determined by computing a maximum value of correlation between one sequence of a couple and a plurality of sequences of sampled values included in corresponding moving windows. | 12-23-2010 |
Paolo Di Iorio, Marcianise IT
| Patent application number | Description | Published |
|---|---|---|
| 20080209550 | Method For Detecting and Reacting Against Possible Attack to Security Enforcing Operation Performed by a Cryptographic Token or Card - The approach defines a protection mechanism against attacks to a security enforcing operation performed by cryptographic token or smart card. It is based on an attack detector which signals the main elaboration or processing system regarding a potential attack situation. The approach addresses SIM cloning problems of telecommunications operators who use old and breakable cryptographic algorithms such as the COMP-128 and do not want to invest in updating the network authentication systems with more resistant authentication cryptographic algorithms. The approach may be applicable to the typical telecommunications operator in an emerging market that does not use state of the art technology. | 08-28-2008 |
Stephane Di Iorio, Lans-En-Vercors FR
| Patent application number | Description | Published |
|---|---|---|
| 20110229786 | ELECTROLYTE PLATE WITH INCREASED RIGIDITY, AND ELECTROCHEMICAL SYSTEM COMPRISING SUCH AN ELECTROLYTE PLATE - An electrolyte plate for an electrochemical system including a first face and a second face, being opposite each other, of largest surface area, the first face including linear parallel ribs and the second face including linear parallel ribs. The plate thus exhibits an increased rigidity without substantially increasing the thickness thereof. | 09-22-2011 |