| Patent application number | Description | Published |
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| 20090275265 | ENDPOINT DETECTION IN CHEMICAL MECHANICAL POLISHING USING MULTIPLE SPECTRA - A computer implemented method includes obtaining at least one current spectrum with an in-situ optical monitoring system, comparing the current spectrum to a plurality of different reference spectra, and determining based on the comparing whether a polishing endpoint has been achieved for the substrate having the outermost layer undergoing polishing. The current spectrum is a spectrum of light reflected from a substrate having an outermost layer undergoing polishing and at least one underlying layer. The plurality of reference spectra represent spectra of light reflected from substrates with outermost layers having the same thickness and underlying layers having different thicknesses. | 11-05-2009 |
| 20090318060 | CLOSED-LOOP CONTROL FOR EFFECTIVE PAD CONDITIONING - A method and apparatus for conditioning a polishing pad is provided. The conditioning element is held by a conditioning arm rotatably mounted to a base at a pivot point. An actuator pivots the arm about the pivot point. The conditioning element is urged against the surface of the polishing pad, and translated with respect to the polishing pad to remove material from the polishing pad and roughen its surface. The interaction of the abrasive conditioning surface with the polishing pad surface generates a frictional force. The frictional force may be monitored by monitoring the torque applied to the pivot point, and material removal controlled thereby. The conditioning time, down force, translation rate, or rotation of the conditioning pad may be adjusted based on the measured torque. | 12-24-2009 |
| 20110256812 | CLOSED-LOOP CONTROL FOR IMPROVED POLISHING PAD PROFILES - Embodiments described herein use closed-loop control (CLC) of conditioning sweep to enable uniform groove depth removal across the pad, throughout pad life. A sensor integrated into the conditioning arm enables the pad stack thickness to be monitored in-situ and in real time. Feedback from the thickness sensor is used to modify pad conditioner dwell times across the pad surface, correcting for drifts in the pad profile that may arise as the pad and disk age. Pad profile CLC enables uniform reduction in groove depth with continued conditioning, providing longer consumables lifetimes and reduced operating costs. | 10-20-2011 |
| Patent application number | Description | Published |
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| 20080197412 | MULTI-LAYER SOURCE/DRAIN STRESSOR - A method for forming a semiconductor device includes forming a recess in a source region and a recess in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer in the recess in the source region and a second semiconductor material layer in the recess in the drain region, wherein each of the first semiconductor material layer and the second semiconductor material layer are formed using a stressor material having a first ratio of an atomic concentration of a first element and an atomic concentration of a second element, wherein the first element is silicon and a first level of concentration of a doping material. The method further includes forming additional semiconductor material layers overlying the first semiconductor material layer and the second semiconductor material layer that have a different ratio of the atomic concentration of the first element and the second element. | 08-21-2008 |
| 20080293192 | SEMICONDUCTOR DEVICE WITH STRESSORS AND METHODS THEREOF - A semiconductor device is formed in a semiconductor layer. A gate dielectric is formed over a top surface of the semiconductor layer. A gate stack is over the gate dielectric. A sidewall spacer is formed around the gate stack. Using the sidewall spacer as a mask, an implant is performed to form deep source/drain regions in the semiconductor layer. Silicon carbon regions are formed on the deep source/drain regions and a top surface of the gate stack. The silicon carbon regions are silicided with nickel. | 11-27-2008 |
| 20080299724 | METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH EMBEDDED STRESSOR - A method for forming a semiconductor device includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode over the gate dielectric; forming an insulating layer over a sidewall of the gate electrode; defining source and drain regions in the semiconductor substrate adjacent to the insulating layer; implanting a dopant in the source and drain regions of the semiconductor substrate to form doped source and drain regions; forming a sidewall spacer adjacent to the insulating layer; forming a recess in the semiconductor substrate in the source and drain regions, wherein the recess extends directly underneath the spacer a predetermined distance from a channel regions; and forming a stressor material in the recess. The method allows the stressor material to be formed closer to a channel region, thus improving carrier mobility in the channel while not degrading short channel effects. | 12-04-2008 |
| 20090146180 | LDMOS WITH CHANNEL STRESS - A method of forming a metal oxide semiconductor (MOS) device comprises defining an active area in an unstrained semiconductor layer structure, depositing a hard mask overlying the active area and a region outside of the active area, patterning the hard mask to expose the active area, selectively growing a strained semiconductor layer overlying the exposed active area, and forming a remainder of the MOS device. The active area includes a first doped region of first conductivity type and a second doped region of second conductivity type. The strained semiconductor layer provides a biaxially strained channel for the MOS device. During a portion of forming the remainder of the MOS device, dopant of the first conductivity type of the first doped region of the active area and dopant of the second conductivity type of the second doped region of the active area diffuses into overlying portions of the strained semiconductor layer to create a correspondingly doped strained semiconductor layer, thereby providing corresponding doping for the biaxially strained channel. | 06-11-2009 |
| 20090221119 | FABRICATION OF A SEMICONDUCTOR DEVICE WITH STRESSOR - In a semiconductor fabrication process, an epitaxial layer is formed overlying a substrate, wherein there is a lattice mismatch between the epitaxial layer and the substrate. A hard mask having an opening is formed overlying the epitaxial layer. A recess is formed through the epitaxial layer and into the substrate. The recess is substantially aligned to the opening in the hard mask. A channel region of a semiconductor device is formed in the recess. | 09-03-2009 |
