| Patent application number | Description | Published |
|---|
| 20080253356 | METHOD AND SYSTEM FOR A POWER REDUCTION SCHEME FOR ETHERNET PHYS - Aspects of a method and system for a power reduction scheme for Ethernet PHYs are provided. An Ethernet PHY in a link partner may disable transmission via a transmit DAC integrated during an inactive connection, 10Base-T autonegotiation operation, and/or active 10Base-T connection with no data packet transmission. The DAC may be a voltage mode or current mode DAC. The PHY or a MAC device may determine when to disable transmission via the DAC. In this regard, the PHY or the MAC device may generate appropriate signals for disabling the transmission. The DAC may be enabled for transmission by the PHY or the MAC device when a connection becomes active or when an active 10Base-T connection is ready to transmit data. Moreover, the PHY may enable transmission via the DAC when operating in a forced 10Base-T mode of operation and the connection to the link partner is active. | 10-16-2008 |
| 20090253240 | Thick Oxide P-Gate NMOS Capacitor for Use In A Low-Pass Filter of a Circuit and Method of Making Same - A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P | 10-08-2009 |
| 20100225362 | Reduced line driver output dependency on process, voltage, and temperature variations - According to one exemplary embodiment, a transmitter module includes a line drive including a current digital-to-analog converter, where the line driver provides an analog output waveform. The current digital-to-analog converter receives a digitally filtered input waveform including at least two voltage steps. The at least two voltage steps of the digitally filtered input waveform cause a rise time of the analog output waveform to have a reduced dependency on process, voltage, and temperature variations in the line driver, while meeting stringent rise time requirements. The digitally filtered input waveform has an initial voltage level and a final voltage level, where the final voltage level is substantially equal to a sum of the at least two voltage steps of the digitally filtered input waveform. | 09-09-2010 |
| 20100259300 | Circuit for digitally controlling line driver current - In one embodiment, a circuit for providing a tail current for a line driver includes an adjustable current source. The adjustable current source includes a number of current source cells coupled together in a parallel configuration, where the current source cells are configured to provide the tail current for the line driver in response to a digital control signal. The circuit can further include a digital core coupled to the adjustable current source, where the digital core provides the digital control signal. The digital control signal provides a number of bits, where each bit controls one of the current source cells. In one embodiment, a current source cell can comprise a number of current source sub-cells. The current source cells can be configured to provide the tail current for the line driver in response to the digital control signal when the line driver is operating in a class AB mode. | 10-14-2010 |
| 20100259340 | Active termination and switchable passive termination circuits - According to one exemplary embodiment, an active termination circuit includes at least one active termination branch, where the at least one active termination branch includes at least one transistor for providing an active termination output. The at least one active termination branch further includes an amplifier driving the at least one transistor, where the amplifier has a non-inverting input coupled to the active termination output via a feedback network. The amplifier controls a current flowing through the at least one transistor so as to provide the active termination output. The active termination output can be provided at a drain of the at least one transistor, where a source of the at least one transistor is coupled to ground through a degeneration transistor and a tail current sink. | 10-14-2010 |
| 20110158137 | Receiver Based Power Efficient Transmitter for Ethernet - Systems and methods are used to adjust, e.g., reduce, current driving a transmitter, i.e., to reduce transmitter power consumption, based on an actual value of a received signal from received along a cable. For example, this is very beneficial to an Ethernet system where the received signal is attenuated by the lossy cable. In this case, the transmitter power consumption can be lowered during a normal application where data is transmitted and received through the cable. | 06-30-2011 |
| 20110199129 | Line Driver with Reduced Dependency on Process, Voltage, and Temperature - According to one exemplary embodiment, a transmitter module includes a line drive including a current digital-to-analog converter, where the line driver provides an analog output waveform. The current digital-to-analog converter receives a digitally filtered input waveform including at least two voltage steps. The at least two voltage steps of the digitally filtered input waveform cause a rise time of the analog output waveform to have a reduced dependency on process, voltage, and temperature variations in the line driver, while meeting stringent rise time requirements. The digitally filtered input waveform has an initial voltage level and a final voltage level, where the final voltage level is substantially equal to a sum of the at least two voltage steps of the digitally filtered input waveform. | 08-18-2011 |
| 20110204967 | False-link protection circuit and method for utilizing same - Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state. | 08-25-2011 |
