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Derderian, ID

Garo Derderian, Boise, ID US

Patent application numberDescriptionPublished
20110133265MEMORY CELL - A memory cell has a tunnel dielectric over a first silicon-containing material, a second silicon-containing material over the tunnel dielectric, a first silicon oxide layer on an edge of the second silicon-containing material and extending across a first portion of an edge of the tunnel dielectric, and a second silicon oxide layer on a side of the first silicon-containing material and extending across a second portion of the edge of the tunnel dielectric. The first and second silicon oxide layers are two distinct layers and are in contact with the tunnel dielectric layer.06-09-2011

Garo J. Derderian, Boise, ID US

Patent application numberDescriptionPublished
20080241386Atomic Layer Deposition Methods - The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.10-02-2008
20080251828ENHANCED ATOMIC LAYER DEPOSITION - A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substrate. In an embodiment, the layer includes at least one element from each of the first and second precursors. In an embodiment, the layer is TaN. In an embodiment, the precursors are TaF10-16-2008
20090127105SYSTEMS AND METHODS FOR FORMING NIOBIUM AND/OR VANADIUM CONTAINING LAYERS USING ATOMIC LAYER DEPOSITION - A method of forming (and an apparatus for forming) a metal containing layer on a substrate, particularly a semiconductor substrate or substrate assembly for use in manufacturing a semiconductor or memory device structure, using one or more precursor compounds that include niobium and/or vanadium and using an atomic layer deposition process including a plurality of deposition cycles.05-21-2009
20090215252Methods of Depositing Materials Over Substrates, and Methods of Forming Layers over Substrates - The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is utilized to introduce at least one precursor into a chamber during ALD, and in particular aspects the supercritical fluid is utilized to introduce multiple precursors into the reaction chamber during ALD. The invention can be utilized to form any of various materials, including metal-containing materials, such as, for example, metal oxides, metal nitrides, and materials consisting of metal. Metal oxides can be formed by utilizing a supercritical fluid can be utilized to introduce a metal-containing precursor into reaction chamber, with the precursor then forming a metal-containing layer over a surface of a substrate. Subsequently, the metal-containing layer can be reacted with oxygen to convert at least some of the metal within the layer to metal oxide.08-27-2009
20100047945Methods Of Forming Particle-Containing Materials - The invention includes methods of forming particle-containing materials, and also includes semiconductor constructions comprising particle-containing materials. One aspect of the invention includes a method in which a first monolayer is formed across at least a portion of a semiconductor substrate, particles are adhered to the first monolayer, and a second monolayer is formed over the particles. Another aspect of the invention includes a construction containing a semiconductor substrate and a particle-impregnated conductive material over at least a portion of the semiconductor substrate. The particle-impregnated conductive material can include tungsten-containing particles within a layer which includes tantalum or tungsten.02-25-2010
20110108929ENHANCED ATOMIC LAYER DEPOSITION - Atomic layer deposition is enhanced using plasma. Plasma begins prior to flowing a second precursor into a chamber. The second precursor reacts with a first precursor to deposit a layer on a substrate. The layer may include at least one element from each of the first and second precursors. The layer may be TaN, and the precursors may be TaF05-12-2011
20110147935METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS - A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.06-23-2011

Patent applications by Garo J. Derderian, Boise, ID US

James M. Derderian, Boise, ID US

Patent application numberDescriptionPublished
20080241985Microelectronic imaging units and methods of manufacturing microelectronic imaging units - Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.10-02-2008
20080246133Flip-chip image sensor packages and methods of fabricating the same - There is provided an imager package including an image sensor die attached to a transparent substrate such that sensitive image sensing components on the sensor die face the transparent substrate. In accordance with an embodiment of the present technique, the imager package may be coupled to an external package via bond wires and other interconnect elements. The sensor die and bond wires may be protected by an encapsulant on which the interconnect elements may be disposed. The bond wires may enable placement of the interconnect elements partially or directly above the sensor die, as opposed to around an outer periphery of the sensor die. There is further provided a method of manufacturing an imager package wherein interconnect elements may be located partially or directly above the sensor die, enabling the manufacture of smaller imager packages than previously envisioned.10-09-2008
20080268563Microelectronic Imaging Units and Methods of Manufacturing Microelectronic Imaging Units - Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.10-30-2008
20090148969MICROELECTRONIC IMAGING UNITS - Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes providing a plurality of imaging dies on a microfeature workpiece. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes attaching a plurality of covers to corresponding imaging dies, cutting the microfeature workpiece to singulate the imaging dies, and coupling the singulated dies to a support member. The covers can be attached to the imaging dies before or after the workpiece is cut.06-11-2009
20090243012ELECTROMAGNETIC INTERFERENCE SHIELD STRUCTURES FOR SEMICONDUCTOR COMPONENTS - A microelectronic device assembly with an integrated conductive shield is disclosed herein. The microelectronic device assembly includes a semiconductor substrate, an integrated circuit carried by the semiconductor substrate, a dielectric encapsulant encasing at least a portion of the semiconductor substrate. The microelectronic device assembly also includes a conductive shield in direct contact with at least a portion of the dielectric encapsulant and an interconnect extending through the semiconductor substrate and in direct contact with the conductive shield.10-01-2009
20090243051INTEGRATED CONDUCTIVE SHIELD FOR MICROELECTRONIC DEVICE ASSEMBLIES AND ASSOCIATED METHODS - Microelectronic device assemblies having integrated conductive shields are disclosed herein. The microelectronic device assemblies include a semiconductor substrate having a bond site and a solder ball electrically connected to the bond site, a dielectric sidewall at least partially encapsulating the semiconductor substrate, and a conductive shield in direct contact with the sidewall and in electrical communication with the solder ball and the bond site.10-01-2009
20100167451METHODS OF MANUFACTURING IMAGING DEVICE PACKAGES - Methods of manufacturing an imaging device package are provided. In accordance with an embodiment a sensor die may be coupled to bond pads on a transparent substrate. Electrically conductive paths comprising bond wires are formed through the bond pads from the sensor die to an outer surface of the imaging device package.07-01-2010

Patent applications by James M. Derderian, Boise, ID US