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Deram
Alain Deram, Colomiers FR
| Patent application number | Description | Published |
|---|---|---|
| 20080217657 | Power Semiconductor Device and Method of Manufacturing a Power Semiconductor Device - A semiconductor power switch having an array of basic cells in which peripheral regions in the active drain region extend beside the perimeter of the base-drain junction, the peripheral regions being of higher dopant density than the rest of the second drain layer. Intermediate regions in the centre of the active drain region are provided of lighter dopant density than the rest of the second drain layer. This provides an improved compromise between the on-state resistance and the breakdown voltage by enlarging the current conduction path at in its active drain region. On the outer side of each edge cell of the array, the gate electrode extends over and beyond at least part of the perimeters of the base-source junction and the base-drain junction towards the adjacent edge of the die. Moreover, on the outer side of each edge cell, the second drain layer includes a region of reduced dopant density that extends beyond the gate electrode right to the adjacent edge of the die | 09-11-2008 |
| 20080283955 | Temperature Sensing Device - The present invention relates to an integrated device, comprising a semiconductor device formed on a semiconductor substrate, a temperature sensing element formed within a semi-conductive layer formed on the semiconductor substrate, an electrically insulating layer formed over the semi-conductive layer, a metal layer formed over the insulation layer and forming an electrical contact of the semiconductor device, and a thermal contact extending from the metal layer through the electrically insulating layer to a first region of the semi-conductive layer, wherein the first region of the semi-conductive layer is electrically isolated from the temperature sensing element. The present invention also relates to a method of forming a temperature sensing element for integration with a semiconductor device. | 11-20-2008 |
| 20100109078 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE - A method of forming a semiconductor device comprises providing a semiconductor substrate, providing a semiconductor layer of a first conductivity type over the semiconductor substrate, forming a first region of the first conductivity type in the semiconductor layer, and forming a control region over the semiconductor layer and over part of the first region. A mask layer is formed over the semiconductor layer and outlines a first portion of a surface of the semiconductor layer over part of the first region. Semiconductor material of a second conductivity type is provided to the outlined first portion to provide a second region in the semiconductor layer. The first region and second region are driven into the semiconductor layer so as to form a pre-control region of the first conductivity type extending into the semiconductor layer from the surface and under a portion of the control region and a graded body region of the second conductivity type extending into the semiconductor layer under the pre-control region. A body region is formed by providing semiconductor material of the second conductivity type to the outlined first portion. The body region extends into the pre-control region. A current electrode region is formed in the body region. | 05-06-2010 |
Brian Deram, Lincolnshire, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20110096507 | Microelectronic thermal interface - An improved thermal interface between an integrated circuit chip and a heat sink comprises a copper grid embedded in a layer of a solder material that has a fusion temperature higher than the maximum operating temperature of the semiconductor chip, and bonds to the semiconductor chip and the heat sink when heated to the fusion temperature of the solder material in the presence of a soldering flux. The copper grid has high thermal conductivity so that the amount of solder material needed for an efficient thermal interface is reduced and solder materials with less expensive components may be used. The copper grid also tends to mitigate local hot spots by enhancing lateral heat transfer, and inhibits solder spreading during formation of the thermal interface. | 04-28-2011 |
Ivana Deram, Colomiers FR
| Patent application number | Description | Published |
|---|---|---|
| 20090014792 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device comprising an array of cells distributed over a surface of a substrate, the source regions of the individual cells of the array comprising a plurality of source region branches each extending laterally outwards towards at least one source region branch of an adjacent cell and presenting juxtaposed ends, the base regions of the individual cells of the array comprising a corresponding plurality of base region branches merging together adjacent and between the juxtaposed ends of the source region branches to form a single base region surrounding the source regions of the individual cells of the array in the substrate. The junctions between the merged base region and the drain region are solely concave laterally and define rounded current conduction path areas for the on-state of the device between adjacent cells that are depleted in the off-state of the device to block flow of current from the source regions to the drain electrode. Floating voltage regions of opposite conductivity type to the drain region are buried in the substrate beneath the merged base region and present features corresponding to and juxtaposed with features of the merged base region in each cell so that the voltage of the floating voltage regions tends to the voltage of the source regions when depletion layers blocking the current conduction paths reach the floating voltage regions, whereby to enhance the development of the depletion layers. The features of the floating voltage regions define rings of the opposite conductivity type to the drain region that surround the current conduction paths of respective cells. The floating voltage regions include respective islands situated within the current conduction paths. | 01-15-2009 |
| 20100001344 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE - A method of forming a semiconductor device having an active area and a termination area surrounding the active area comprises providing a semiconductor substrate, providing a semiconductor layer of a first conductivity type over the semiconductor substrate and forming a mask layer over the semiconductor layer. The mask layer outlines at least two portions of a surface of the semiconductor layer: a first outlined portion outlining a floating region in the active area and a second outlined portion outlining a termination region in the termination area. Semiconductor material of a second conductivity type is provided to the first and second outlined portions so as to provide a floating region of the second conductivity type buried in the semiconductor layer in the active area and a first termination region of the second conductivity type buried in the semiconductor layer in the termination area of the semiconductor device. | 01-07-2010 |