Patent application number | Description | Published |
20090096060 | Antifuse structures, antifuse array structures, methods of manufacturing the same - Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array. | 04-16-2009 |
20090097321 | Non-volatile memory device, method of operating the same, and method of fabricating the same - A non-volatile memory device may include at least one semiconductor layer, a plurality of control gate electrodes, a plurality of charge storage layers, at least one first auxiliary electrode, and/or at least one second auxiliary electrode. The plurality of control gate electrodes may be recessed into the semiconductor layer. The plurality of charge storage layers may be between the plurality of control gate electrodes and the semiconductor layer. The first and second auxiliary electrodes may be arranged to face each other. The plurality of control gate electrodes may be between the first and second auxiliary electrodes and capacitively coupled with the semiconductor layer. | 04-16-2009 |
20090206978 | Electrical fuse device including a fuse link - Example embodiments relate to an electrical device, for example, to an electrical fuse device that includes a fuse link for linking a cathode and anode. An electrical device may include a cathode, an anode, and a fuse link. The fuse link may link the cathode and the anode. The fuse link may include a multi-metal layer structure. The fuse link may include a first metal layer including a first resistance, and a second metal layer stacked on the first metal layer and including a second resistance. The first resistance may be different from the second resistance. The fuse link may include a weak point as a region at which electrical blowing is performed easier than other regions of the fuse link. | 08-20-2009 |
20090231900 | Fuse devices and methods of operating the same - A fuse device includes a fuse unit, which includes a cathode, an anode, and a fuse link coupling the cathode and the anode. A transistor includes at least a portion of the fuse unit to be used as an element of the transistor. | 09-17-2009 |
20090243787 | Electrical fuse devices and methods of operating the same - Provided are an electrical fuse device and a method of operating the same. The electrical fuse device may include a fuse link having a multi layer structure with at least two metal layers. The number of metal layers that are blown, from among the at least two metal layers, may vary according to either the duration of application of voltage or the strength of voltage applied. | 10-01-2009 |
20090256624 | Antifuse and methods of operating and manufacturing the same - Provided are an antifuse and methods of operating and manufacturing the same. The antifuse may include first and second conductors separate from each other; a dielectric layer for an antifuse between the first and second conductors; and a diffusion layer between one of the first and second conductors and the dielectric layer. | 10-15-2009 |
20100117054 | NON-VOLATILE MEMORY DEVICE WITH DATA STORAGE LAYER - Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode. | 05-13-2010 |
20100224956 | E-FUSE STRUCTURE OF SEMICONDUCTOR DEVICE - An e-fuse structure includes an anode, a cathode, a fuse part connecting the anode and the cathode to each other, and a dielectric contacting the fuse part. The dielectric is configured to apply a stress to the fuse part, where the stress constructively acting on a migration effect of atoms constituting the fuse part. The migration effect is generated by electromigration and thermomirgration. | 09-09-2010 |
20100237312 | Nonvolatile memory device - The nonvolatile memory device includes at least one pair of first electrode lines, at least one device structure disposed between the at least one pair of first electrode lines and a dielectric layer disposed between the at least one device structure and the at least one pair of first electrode lines. The at least one device structure includes a second electrode line including a first conductive type semiconductor, a resistance changing material layer adjacent to the second electrode line, a channel adjacent to the resistance changing material layer and including a second conductive type semiconductor different from the first conductive type semiconductor and a third electrode line adjacent to the channel and including the first conductive type semiconductor. | 09-23-2010 |
20110038197 | VARIABLE RESISTANCE MEMORY AND MEMORY SYSTEM INCLUDING THE SAME - A variable resistance memory array includes at least one variable resistance memory cell, wherein each variable resistance memory cell includes a well having a first type; and a cell structure on the well, the cell structure including a structure having a second type different from the first type and a variable resistance layer on the structure. | 02-17-2011 |
20110068409 | RESISTIVE MEMORY DEVICES INCLUDING VERTICAL TRANSISTOR ARRAYS AND RELATED FABRICATION METHODS - A resistive memory device includes a vertical transistor and a variable resistance layer. The vertical transistor includes a gate electrode on a surface of a substrate, a gate insulation layer extending along a sidewall of the gate electrode, and a single crystalline silicon layer on the surface of the substrate adjacent to the gate insulation layer. At least a portion of the single crystalline silicon layer defines a channel region that extends in a direction substantially perpendicular to the surface of the substrate. The variable resistance layer is provided on the single crystalline silicon layer. The variable resistance layer is electrically insulated from the gate electrode. Related devices and fabrication methods are also discussed. | 03-24-2011 |
20110102067 | Fuse devices and methods of operating the same - A fuse device includes a fuse unit, which includes a cathode, an anode, and a fuse link coupling the cathode and the anode. A transistor includes at least a portion of the fuse unit to be used as an element of the transistor. | 05-05-2011 |
20110115049 | Non-volatile memory devices, methods of manufacturing and methods of operating the same - A non-volatile memory device includes: at least one horizontal electrode; at least one vertical electrode disposed to intersect the at least one horizontal electrode at an intersection region; at least one data layer disposed at the intersection region and having a conduction-insulation transition property; and at least one anti-fuse layer connected in series with the at least one data layer. | 05-19-2011 |
20110194328 | VARIABLE RESISTANCE MEMORY DEVICE AND RELATED METHOD OF OPERATION - A variable resistance memory device comprises a variable resistance memory cell, a switch that selectively passes a write voltage to an input terminal of the variable resistance memory cell, and a trigger circuit that controls the switch to cut off the write voltage from the input terminal upon determining that the variable resistance memory cell is programmed to a target state by detecting voltage fluctuation of the one side of variable resistance memory cell. | 08-11-2011 |
20140036575 | VARIABLE RESISTANCE MEMORY DEVICE AND RELATED METHOD OF OPERATION - A variable resistance memory device comprises a variable resistance memory cell, a switch that selectively passes a write voltage to an input terminal of the variable resistance memory cell, and a trigger circuit that controls the switch to cut off the write voltage from the input terminal upon determining that the variable resistance memory cell is programmed to a target state by detecting voltage fluctuation of the one side of variable resistance memory cell. | 02-06-2014 |
20140293688 | PHASE-CHANGE MEMORY DEVICE AND METHOD FOR MULTI-LEVEL PROGRAMMING OF PHASE-CHANGE MEMORY DEVICE - The present disclosure provides a multi-level programming method of a phase-change memory device. The multi-level programming method comprises selecting a word line, where data are to be input, from multiple word lines; applying multiple bits of data to a bit line of a cell connected to the selected word line; applying a program current to the selected word line for programming of first data; applying a program current to the selected word line and applying a multi-level program current lower than the program current to one of word lines adjacent to the selected word line for programming of second data; and applying a program current to the selected word line and applying a multi-level program current lower than the program current to tow of the word lines adjacent to the selected word line for programming of third data. | 10-02-2014 |
20140339489 | PHASE-CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase-change memory device is provided. The memory device includes a lower electrode, a phase-change material layer formed on the lower electrode, an upper electrode formed on the phase-change material layer, and a stress insulation film formed to surround the phase-change material layer. | 11-20-2014 |