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Delp, US
David B. Delp, San Francisco, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080276278 | USER INTERFACE PRESENTING ENHANCED VIDEO CONTENT INFORMATION ASSOCIATED WITH VIDEO PROGRAMS - Providing interactive access to video programming and video content information in a multimedia system. A processing device of the multimedia system receives video content information associated with video programming that is to be broadcast. The video content information includes at least video identification information and video content information. The display device of the multimedia system presents a first interface image that presents the video content information for one of the video programs of the video programming. In response to viewer input, a second interface image is displayed on the display device presenting video content information for another one of the video programs of the video programming or for more detailed information associated with the video program. In this manner, the viewer can conveniently navigate through the video content information and identify information that is useful in selecting a program to watch. | 11-06-2008 |
Deana Delp, Tempe, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20110178967 | METHODS AND APPARATUS FOR DATA ANALYSIS - A method and apparatus for data analysis according to various aspects of the present invention is configured to test a set of components and generate test data for the components. A diagnostic system automatically analyzes the test data to identify a characteristic of a component fabrication process by recognizing a pattern in the test data and classifying the pattern using a neural network. | 07-21-2011 |
Edward J. Delp, West Lafayette, IN US
| Patent application number | Description | Published |
|---|---|---|
| 20090022226 | Method and apparatus for enhancing resolution of video image - Provided is a technology which can prevent deterioration of image quality when enhancing resolution of a predetermined key frame in a video sequence. Specifically, an apparatus to enhance resolution of a video frame is provided. The apparatus includes a frame extraction unit which extracts a key frame and one or more neighboring frames of the key frame from a video sequence; an upsampling unit which upsamples the key frame and the neighboring frames; a motion-vector search unit which calculates a motion vector of the upsampled key frame using the upsampled neighboring frames as reference frames; and a key-frame estimation unit which enhances quality of the upsampled key frame using temporal information obtained from the motion vector and spatial information in the key frame. | 01-22-2009 |
| 20110123063 | Synchronization of Digital Watermarks - A method for synchronization of a digital watermark generates a digital watermark based on feature extraction and a key generator. The synchronization method is adapted for both temporal and spatial synchronization. Statistical features of the watermarked signal along with key generators are used to compute keys used to detect embedded digital watermarks that vary over time or space. For spatial synchronization, spatial redundancy is used to detect geometric distortion of a signal in which the watermark is embedded using an autocorrelation method to detect peaks caused by the redundancy of the watermark structure. These peaks are then analyzed with a histogram method to detect rotation and scaling of the host media signal. The spatial synchronization process is applied to watermarks for both intra-coded frames of video (I-frames) as well as still images. | 05-26-2011 |
Edward John Delp, West Lafayette, IN US
Gary Delp, Rochester, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20100264983 | Systems and Methods for Power Dissipation Control in a Semiconductor Device - Various embodiments of the present invention provide systems and methods for governing power dissipation in a semiconductor device. For example, various embodiments of the present invention provide semiconductor devices that include a first function circuit, a second function circuit, and a power state change control circuit. The power state change control circuit is operable to determine a combination of power states of the first function circuit and the second function circuit that provides an overall power dissipation within a power dissipation level. | 10-21-2010 |
| 20100268917 | Systems and Methods for Ramped Power State Control in a Semiconductor Device - Various embodiments of the present invention provide systems and methods for ramping current usage in a semiconductor device. For example, various embodiments of the present invention provide semiconductor devices that include at least a first function circuit and a second function circuit, and a power state change control circuit. The power state change control circuit is operable to transition the power state of the first function circuit from a reduced power state to an operative power state, and to transition the second function circuit from a reduced power state to an operative power state. Transition of the power state of at least one of the first function circuit and the second function circuit is done in at least a first stage at a first time and a second stage at a second time, with the second time being after the first time. | 10-21-2010 |
| 20100269074 | Predictive Power Management Semiconductor Design Tool and Methods for Using Such - Various embodiments of the present invention provide systems and methods for improved semiconductor design. For example, various embodiments of the present invention provide methods for semiconductor design that include receiving a semiconductor design with at least a first function circuit and a second function circuit; simulating the semiconductor design using a first instruction and a second instruction; determining a power state transition between the first instruction and the second instruction; and augmenting the semiconductor design to implement the determined power state transition. Simulating the semiconductor design using a first instruction and a second instruction identifies an indication of a first subset of the first function circuit and the second function circuit used in executing the first instruction and a second subset of the first function circuit and the second function circuit used in executing the second instruction. The power state transition accommodates at least one power attribute selected from a group consisting of: an inrush current value, and an overall power dissipation value. | 10-21-2010 |
Gary S. Delp, Rochester, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20080248612 | ASYMMETRIC ALIGNMENT OF SUBSTRATE INTERCONNECT TO SEMICONDUCTOR DIE - An apparatus includes a first semiconductor die and at least one further semiconductor die. A substrate is attached to the first die and the further die and has an electrical interconnect pattern that interconnects contacts on the first die with respective contacts on the further die. Features of the interconnect pattern have positions on the substrate with smaller tolerances relative to positions of the contacts on the first die than to positions of the contacts on the further die. | 10-09-2008 |
| 20100031222 | BASE PLATFORMS WITH COMBINED ASIC AND FPGA FEATURES AND PROCESS OF USING THE SAME - A process is disclosed for configuring a base platform having ASIC and FPGA modules to perform a plurality of functions. A verified RTL hardware description of a circuit is mapped and annotated to identify memory programmable functions. The memory programmable functions are grouped for assignment to FPGA modules. The non-memory programmable functions are synthesized to ASIC modules, and the memory programmable functions are synthesized to FPGA modules. Placement, signal routing and boundary timing closure are completed and the platform is configured by adding metallization layer(s) to configure the ASIC modules and creating a firmware memory to configure the FPGA modules. An over-provisioning feature in the FPGA modules permits post-fabrication alteration of logic functions. | 02-04-2010 |
Scott Delp, Stanford, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080249394 | METHOD FOR IMPROVED ROTATIONAL ALIGNMENT IN JOINT ARTHROPLASTY - A method for improved rotational alignment of the bones in joint surgery is described. The method involves the tracking of the relative motion of a third bone in with respect to the movement of the first and second bone. In one aspect of the invention, the motion of the patella is used to derive the axis of rotation of the femoral and tibial components in total knee arthroplasty, either alone or in combination with other techniques. | 10-09-2008 |
Scott L. Delp, Stanford, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090012406 | METHOD AND SYSTEM OF USING INTRINSIC-BASED PHOTOSENSING WITH HIGH-SPEED LINE SCANNING FOR CHARACTERIZATION OF BIOLOGICAL THICK TISSUE INCLUDING MUSCLE - Biological thick tissue such as skeletal and cardiac muscle is imaged by inserting a probe into the tissue and scanning the tissue at a sufficiently fast rate to mitigate motion artifacts due to physiological motion. According to one example embodiment, such a probe is part of a system that is capable of reverse-direction high-resolution imaging without staining or otherwise introducing a foreign element used to generate or otherwise increase the sensed light. The probe includes a light generator for generating light pulses that are directed towards structures located within the thick tissue. The light pulses interact with intrinsic characteristics of the structures to generate a signal such as SHG or intrinsic fluorescence. Reliance on intrinsic characteristics of the structures is particularly useful for applications in which the introduction of foreign substances to the thick tissue is undesirable. | 01-08-2009 |
| 20110166632 | MATERIALS AND APPROACHES FOR OPTICAL STIMULATION OF THE PERIPHERAL NERVOUS SYSTEM - A variety of methods, devices, systems and arrangements are implemented for stimulation of the peripheral nervous system. Consistent with one embodiment of the present invention, method is implemented in which light-responsive channels or pumps are engineered in a set of motor units that includes motor units of differing physical volumes. Optical stimuli are also provided to the light-responsive channels or pumps at an optical intensity that is a function of the size of motor units to be recruited. In certain implementations, the intensity of the optical stimuli is increased so as to recruit increasingly larger motor units. | 07-07-2011 |
Shanan Jeremy Delp, San Francisco, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090077495 | Method and System of Creating a Personalized Homepage - A method of automatically creating a personalized homepage which infers one or more categories of interest from previous user activities in a different but related web service product, instead of expressly asking the user to input his/her areas of interest. | 03-19-2009 |