| Patent application number | Description | Published |
| 20100112360 | LAYERED THERMAL INTERFACE SYSTEMS METHODS OF PRODUCTION AND USES THEREOF - A layered thermal interface system is described herein that comprises: at least one deposition layer of metal, at least one layer of thermal interface material, at least one plated layer of metal, and at least one heat spreader. Another layered thermal interface system is described herein that comprises: a silicon layer, at least one deposition layer of metal, at least one layer of thermal interface material, at least one plated layer of metal, and at least one heat spreader Methods of forming contemplated layered thermal system comprise: a) providing at least one deposition layer of metal, b) providing at least one plated layer of metal, c) providing at least one thermal interface material, and d) layering the at least one deposition layer of metal, the at least one thermal interface material, and the at least one plated layer of metal to produce the layered thermal system. Methods of forming another contemplated layered thermal system comprise: a) providing a silicon die, layer or surface, b) providing at least one deposition layer of metal, c) providing at least one plated layer of metal, d) providing at least one thermal interface material, e) providing at least one heat spreader material, and f) layering the silicon surface, the at least one deposition layer of metal, the at least one thermal interface material, the at least one plated layer of metal and the at least one heat spreader to produce the layered thermal system. | 05-06-2010 |
| 20100129648 | ELECTRONIC PACKAGING AND HEAT SINK BONDING ENHANCEMENTS, METHODS OF PRODUCTION AND USES THEREOF - Electronic components described herein include a heat generating component surface; a heat sink having a top surface and a bottom surface; and a thermal interface material comprising a phase change material, wherein the heat generating component surface is coupled to the bottom surface of the heat sink by the thermal interface material. Methods of forming an electronic component include: a) providing a heat-generating component surface; b) providing at least one thermal interface material; c) providing a heat sink component having a top surface and a bottom surface; d) depositing the at least one thermal interface material onto at least part of at least one of the surfaces of the heat sink component, and e) coupling the surface of the heat sink component with the thermal interface material layer with the heat generating component surface to produce the electronic component. | 05-27-2010 |
| Patent application number | Description | Published |
| 20080315955 | CLASS L AMPLIFIER - A new Class L amplifier which dynamically switches between multiple pairs of power rails, and has the ability to select the most advantageous combination of rails for the minimization of power dissipation in the amplifier. In one embodiment, a bridged amplifier system includes two Class L amplifiers to drive a load. | 12-25-2008 |
| 20110129098 | ACTIVE NOISE CANCELLATION - This document discusses, among other things, systems and methods for active noise cancellation. One example system includes a digital ANC circuit configured to receive first audio information from a first microphone and to produce an a digital anti-noise signal configured to attenuate noise sensed by the first microphone; an analog ANC circuit configured to receive second audio information from a second microphone and to produce an analog anti-noise signal configured to attenuate noise sensed by the second microphone; and wherein the system is configured to receive an intended audio signal and to provide an output signal for a speaker using the intended audio signal, the analog anti-noise signal, and the digital anti-noise signal. | 06-02-2011 |
| 20110148385 | SELECTIVELY ACTIVATED THREE-STATE CHARGE PUMP - This document discusses, among other things, a device for providing a DC output voltage, including a first output voltage and a second output voltage, from an input voltage. The device can include a first voltage regulator configured to provide the first output voltage when the input voltage is below a threshold voltage, and a charge pump configured to provide the second output voltage from the first output voltage in a two-state mode when the input voltage is below the threshold voltage, and to provide the first output voltage and the second output voltage in a three-state mode when the input voltage is above the threshold voltage. | 06-23-2011 |
| 20110148510 | REDUCED CURRENT CHARGE PUMP - This document discusses, among other things, a charge pump having a plurality of switching devices, coupled in parallel, and configured to selectively provide a variable available drive current for a capacitor using a comparison of an output voltage to at least one reference voltage. | 06-23-2011 |
| Patent application number | Description | Published |
| 20090019267 | Method, System, and Apparatus for Dynamic Reconfiguration of Resources - A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware. | 01-15-2009 |
| 20090024715 | Method, System, and Apparatus for Dynamic Reconfiguration of Resources - A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware. | 01-22-2009 |
| 20090055600 | Method, System, and Apparatus for Dynamic Reconfiguration of Resources - A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware. | 02-26-2009 |
| 20100332767 | Controllably Exiting An Unknown State Of A Cache Coherency Directory - In one embodiment, a method includes receiving a read request from a first caching agent and if a directory entry associated with the request is in an unknown state, an invalidating snoop message is sent to at least one other caching agent to invalidate information in a cache location of the other caching agent corresponding to the location of the read request, to enable setting of the directory entry into a known state. Other embodiments are described and claimed. | 12-30-2010 |
| 20110078384 | MEMORY MIRRORING AND MIGRATION AT HOME AGENT - Methods and apparatus relating to memory mirroring and migration at a Home Agent (HA) are described. In one embodiment, a home agent may mirror its data at a slave agent. In some embodiments, a bit in a directory may indicate status of cache lines. Other embodiments are also disclosed. | 03-31-2011 |
| 20110078492 | HOME AGENT DATA AND MEMORY MANAGEMENT - Methods and apparatus relating to home agent data and memory management are described. In one embodiment, a scrubber logic corrects an error at a location in a memory corresponding to a target address by writing back the corrected version of data to the target location. In an embodiment, a map out logic maps out an index or way of a directory cache in response to a number of errors, corresponding to the directory cache, exceeding a threshold value. Other embodiments are also disclosed. | 03-31-2011 |
| Patent application number | Description | Published |
| 20100179091 | Treatment of Conditions Related to Shock - Techniques are disclosed for prevention or treatment of physiological shock by administering a specific therapeutic agent or combination of therapeutic agents, which is/are able to use smaller volumes of reagent to achieve complete inhibition, than other previously described techniques. | 07-15-2010 |
| 20100303799 | Treatment of Conditions Related to Shock - Techniques are disclosed for prevention or treatment of physiological shock by administering a specific therapeutic agent, which is able to use smaller volumes of reagent to achieve complete inhibition, than other previously described techniques. | 12-02-2010 |
| 20110039781 | Treatment of Conditions Related to Cecal Ligation Shock - Techniques, methods and lavages are disclosed for prevention or treatment of shock, particularly cecal ligation or cecal inoculation shock, by administering a specific therapeutic agent, which is able to use smaller volumes of reagent to achieve partial to complete inhibition, than other previously described techniques. The agent includes a combination of enzyme inhibitor, cytotoxic lipid binding protein, and antibiotic. | 02-17-2011 |