| Patent application number | Description | Published |
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| 20090151754 | Method and Apparatus for Removing Contaminants from Substrate - A cleaning material is applied to a surface of a substrate. The cleaning material includes one or more polymeric materials for entrapping contaminants present on the surface of the substrate. A rinsing fluid is applied to the surface of the substrate at a controlled velocity to effect removal of the cleaning material and contaminants entrapped within the cleaning material from the surface of the substrate. The controlled velocity of the rinsing fluid is set to cause the cleaning material to behave in an elastic manner when impacted by the rinsing fluid, thereby improving contaminant removal from the surface of the substrate. | 06-18-2009 |
| 20100108093 | ACOUSTIC ASSISTED SINGLE WAFER WET CLEAN FOR SEMICONDUCTOR WAFER PROCESS - A method for cleaning a substrate is provided that includes applying a liquid medium to a surface of the substrate such that the liquid medium substantially covers a portion of the substrate that is being cleaned. One or more transducers are used to generate acoustic energy. The generated acoustic energy is applied to the substrate and the liquid medium meniscus such that the applied acoustic energy to the liquid medium prevents cavitation within the liquid medium. The acoustic energy applied to the substrate provides maximum acoustic wave displacement to acoustic waves introduced into the liquid medium. The acoustic energy introduced into the substrate and the liquid medium enables dislodging of the particle contaminant from the surface of the substrate. The dislodged particle contaminants become entrapped within the liquid medium and are carried away from the surface of the substrate by the liquid medium. | 05-06-2010 |
| 20100116290 | COMPOSITION AND APPLICATION OF A TWO-PHASE CONTAMINANT REMOVAL MEDIUM - The embodiments provide substrate cleaning techniques to remove contaminants from the substrate surface to improve device yield. The substrate cleaning techniques utilize a cleaning material with solid components and polymers with a large molecular weight dispersed in a cleaning liquid to form the cleaning material, which is fluidic. The solid components remove contaminants on the substrate surface by making contact with the contaminants. The polymers with large molecular weight form polymer chains and a polymeric network that capture and entrap solids in the cleaning materials, which prevent solids from falling on the substrate surface. In addition, the polymers can also assist in removing contaminants form the substrate surface by making contacts with contaminants on the substrate surface. In one embodiment, the cleaning material glides around protruding features on the substrate surface without making a forceful impact on the protruding features to damage them. The present invention can be implemented in numerous ways, including a material (or solution), a method, a process, an apparatus, or a system. | 05-13-2010 |
| 20100120647 | COMPOSITION OF A CLEANING MATERIAL FOR PARTICLE REMOVAL - The embodiments of the present invention provide improved materials for cleaning patterned substrates with fine features. The cleaning materials have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. To assist removing of particles from the wafer (or substrate) surfaces, the polymeric compound of the polymers can contain a polar functional group, which can establish polar-polar molecular interaction and hydrogen bonds with hydrolyzed particles on the wafer surface. The polymers of a polymeric compound(s) with a large molecular weight form long polymer chains and network. The long polymer chains and/or polymer network show superior capabilities of capturing and entrapping contaminants, in comparison to conventional cleaning materials. The polymeric compound(s) of the polymers may also include a functional group that carries charge in the cleaning solution. The charge of the functional group of the polymers improves the particle removal efficiency. | 05-13-2010 |
| 20100258142 | APPARATUS AND METHOD FOR USING A VISCOELASTIC CLEANING MATERIAL TO REMOVE PARTICLES ON A SUBSTRATE - The embodiments provide apparatus and methods for removing particles from a substrate surface, especially from a surface of a patterned substrate (or wafer). The cleaning apparatus and methods have advantages in cleaning patterned substrates with fine features without substantially damaging the features on the substrate surface. The cleaning apparatus and methods involve using a viscoelastic cleaning material containing a polymeric compound with large molecular weight, such as greater than 10,000 g/mol. The viscoelastic cleaning material entraps at least a portion of the particles on the substrate surface. The application of a force on the viscoelastic cleaning material over a sufficiently short period time causes the material to exhibit solid-like properties that facilitate removal of the viscoelastic cleaning material along with the entrapped particles. A number of forces can be applied over a short period to access the solid-like nature of the viscoelastic cleaning material. Alternatively, when the temperature of the viscoelastic cleaning material is lowered, the visoelastic cleaning material also exhibits solid-like properties. | 10-14-2010 |
| 20100313917 | METHOD OF PARTICLE CONTAMINANT REMOVAL - Apparatus and methods for removing particle contaminants from a solid surface includes providing a layer of a viscoelastic material on the solid surface. The viscoelastic material is applied as a thin film and exhibits substantial liquid-like characteristics. The viscoelastic material at least partially binds with the particle contaminants. A high velocity liquid is applied to the viscoelastic material, such that the viscoelastic material exhibits solid-like behavior. The viscoelastic material is thus dislodged from the solid surface along with the particle contaminants, thereby cleaning the solid surface of the particle contaminants. | 12-16-2010 |
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| 20090063819 | Method and Apparatus for Dynamically Managing Instruction Buffer Depths for Non-Predicted Branches - A method and apparatus for dynamically managing instruction buffer depths for non-predicted branches reduces wasted energy and resources associated with low confidence branch prediction conditions. A portion of the instruction buffer for a instruction thread is allocated for storing predicted branch instruction streams and another portion, which may be zero-sized during high prediction confidence conditions, is allocated to the non-predicted branch instruction stream. The size of the buffers is adjusted dynamically in conformity with an on-going prediction confidence that provides a measure of how well branch prediction mechanisms are working for a given instruction thread. An alternate instruction fetch address table can be maintained and multiplexed with the main fetch address register for addressing the instruction cache, so that the instruction stream can be quickly shifted to the non-predicted path when a branch instruction is resolved to the non-predicted path. | 03-05-2009 |
| 20090094388 | DMA Completion Mechanism - An apparatus and a computer program product are provided for completing a plurality of (direct memory access) DMA commands in a computer system. It is determined whether the DMA commands are chained together as a list DMA command. Upon a determination that the DMA commands are chained together as a list DMA command, it is also determined whether a current list element of the list DMA command is fenced. Upon a determination that the current list element is not fenced, a next list element is fetched and processed before the current list element has been completed. | 04-09-2009 |
| 20090113191 | Apparatus and Method for Improving Efficiency of Short Loop Instruction Fetch - A method, system and computer program product for instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. During instruction fetch, modified instruction buffers coupled to an instruction cache (I-cache) temporarily store instructions from a single branch, backwards short loop. The modified instruction buffers may be a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. Instructions are stored in the modified instruction buffers for the length of the loop cycle. The instruction fetch within the instruction unit of a processor retrieves the instructions for the short loop from the modified buffers during the loop cycle, rather than from the instruction cache. | 04-30-2009 |
| 20090113192 | DESIGN STRUCTURE FOR IMPROVING EFFICIENCY OF SHORT LOOP INSTRUCTION FETCH - A design structure provides instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. During instruction fetch, modified instruction buffers coupled to an instruction cache (I-cache) temporarily store instructions from a single branch, backwards short loop. The modified instruction buffers may be a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. Instructions are stored in the modified instruction buffers for the length of the loop cycle. The instruction fetch within the instruction unit of a processor retrieves the instructions for the short loop from the modified buffers during the loop cycle, rather than from the instruction cache. | 04-30-2009 |
| 20090198959 | SCALABLE LINK STACK CONTROL METHOD WITH FULL SUPPORT FOR SPECULATIVE OPERATIONS - A computer implemented method, a processor chip, a computer program product, and a data processing system managing a link stack. The data processing system utilizes speculative pushes onto and pops from the link stack. The link stack comprises a set of entries, and each entry comprises a set of state bits. A speculative push of a first instruction is received onto the data stack, and the first instruction is stored into a first entry of the set of entries. A first bit is set to indicate that the first instruction is a valid instruction. A second bit is set to indicate that the first instruction has been speculatively pushed onto the link stack. The link stack pointer control is updated to indicate that the first entry is a top-of-data stack entry. | 08-06-2009 |
| 20100031011 | METHOD AND APPARATUS FOR OPTIMIZED METHOD OF BHT BANKING AND MULTIPLE UPDATES - The invention relates to a method and apparatus for controlling the instruction flow in a computer system and more particularly to the predicting of outcome of branch instructions using branch prediction arrays, such as BHTs. In an embodiment, the invention allows concurrent BHT read and write accesses without the need for a multi-ported BHT design, while still providing comparable performance to that of a multi-ported BHT design. | 02-04-2010 |
