| Patent application number | Description | Published |
|---|
| 20080273602 | DATA TRANSMISSION APPARATUS WITH INFORMATION SKEW AND REDUNDANT CONTROL INFORMATION AND METHOD - Apparatus and methods provide at least redundant control information such as control symbols and control data over respective channels, such as differential lanes, and skew at least the redundant control information in time between the plurality of transmission circuits. Non-control information such as video and/or audio data may also be skewed. Corresponding receiver circuits and methods are also disclosed. | 11-06-2008 |
| 20090147021 | WIDE COLOR GAMUT DISPLAY SYSTEM - A wide gamut RGB digital display, such as an LCD display, digital television, printer, or any other suitable display, includes wide color gamut configuration message control logic that is operative to indicate, to an image source provider, wide gamut RGB indication information and wide color gamut format definition information that indicates that wide gamut RGB color data is to be received by the wide gamut RGB digital display. The wide gamut configuration message control logic is also operatively responsive to wide gamut confirmation information that is received from the image source provider. The wide gamut RGB digital display also includes logic that is operative to display received wide gamut RGB color data that was received in response to the wide gamut RGB indication information and the format definition information. | 06-11-2009 |
| 20090153734 | METHOD, APPARATUS AND MACHINE-READABLE MEDIUM FOR VIDEO PROCESSING CAPABILITY COMMUNICATION BETWEEN A VIDEO SOURCE DEVICE AND A VIDEO SINK DEVICE - At one of a video source device and a video sink device, an indication of video processing capabilities of the other of the video source device and said video sink device is received. Based upon the indication and an indication of video processing capabilities of the one device, one of a plurality of video processing algorithms is selected for execution by the one device. The selecting may be based upon a set of precedence rules. Categories of video processing may for example include scan-rate conversion, interlacing, de-interlacing, de-noise, scaling, color correction, contrast correction and detail enhancement. | 06-18-2009 |
| 20090153737 | METHOD, APPARATUS AND MACHINE-READABLE MEDIUM FOR APPORTIONING VIDEO PROCESSING BETWEEN A VIDEO SOURCE DEVICE AND A VIDEO SINK DEVICE - To apportion desired video processing between a video source device and a video sink device, at one of the devices, and based upon an indication of video processing algorithms of which the other device is capable and an indication of video processing algorithms of which the one device is capable, a set of video processing algorithms for achieving desired video processing is identified. The identified set of video processing algorithms is classified into a first subset of algorithms for performance by the other device and a second subset of algorithms for performance by the one device. At least one command for causing the other device to effect the first subset of video processing algorithms is sent. The one device may be configured to effect the second subset of algorithms. | 06-18-2009 |
| 20090161016 | Run-Time Selection Of Video Algorithms - Most often a pleasing video scene includes a few objects of great interest shown in front of a relatively uninteresting background. These pleasing scenes can be displayed with greater clarity and realism when the most computing intensive filter algorithms are used for images or parts of images of greatest interest. Run-time selection of algorithms used in particular frames or regions of a frame optimizes the use of filter computation resources. | 06-25-2009 |
| 20110050314 | DISPLAY LINK CLOCKING METHOD AND APPARATUS - An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals. | 03-03-2011 |
| 20110050709 | PIXEL CLOCKING METHOD AND APPARATUS - An apparatus includes a clock circuit and a virtual pixel clock circuit. The clock circuit provides a common clock signal. The virtual pixel clock circuit provides a plurality of pixel clock signals in response to the common clock signal. One of the virtual pixel clock signals is at a different clock speed than another of the plurality of virtual pixel clock signals. | 03-03-2011 |
| 20110057939 | Reading a Local Memory of a Processing Unit - Disclosed herein are systems, apparatuses, and methods for enabling efficient reads to a local memory of a processing unit. In an embodiment, a processing unit includes an interface and a buffer. The interface is configured to (i) send a request for a portion of data in a region of a local memory of an other processing unit and (ii) receive, responsive to the request, all the data from the region. The buffer is configured to store the data from the region of the local memory of the other processing unit. | 03-10-2011 |
| 20110148923 | POWER EFFICIENT MEMORY - A circuit includes a memory circuit. The memory retiling circuit moves image information configured to be distributed among a plurality of memory channels into reconfigured image information configured to be distributed among a subset of the plurality of memory channels. | 06-23-2011 |
