Patent application number | Description | Published |
20110142572 | AUTO-SEQUENCING INLINE PROCESSING APPARATUS - An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays. | 06-16-2011 |
20110142573 | AUTO-SEQUENCING MULTI-DIRECTIONAL INLINE PROCESSING APPARATUS - An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays. | 06-16-2011 |
20120298141 | BROKEN WAFER RECOVERY SYSTEM - An apparatus and method for recovery and cleaning of broken substrates, especially beneficial for fabrication systems using silicon wafer carried on trays. Removal of broken wafers and particles from within the fabrication system is enabled without requiring disassembly of the system and without requiring manual labor. | 11-29-2012 |
20130269149 | BROKEN WAFER RECOVERY SYSTEM - An apparatus and method for recovery and cleaning of broken substrates, especially beneficial for fabrication systems using silicon wafer carried on trays. Removal of broken wafers and particles from within the fabrication system is enabled without requiring disassembly of the system and without requiring manual labor. A placing mechanism moves a suction head to location of the broken substrate and a suction pump coupled to a flexible hose is used to remove the broken pieces. A hood is positioned at the inlet of the suction head, and setback extensions are provided at the bottom of the hood to allow air flow into the inlet and prevent thermal conductance from the tray to the hood. Pins are extendable about the inlet of the suction head to enable breakage of the wafer to smaller pieces for easy removal. | 10-17-2013 |
20130294678 | AUTO-SEQUENCING MULTI-DIRECTIONAL INLINE PROCESSING METHOD - A method for auto-sequencing of plasma processing system for concurrent processing of several substrates. The method autonomously sequence processing and move substrates in different directions as necessary. The method moves two substrate trays together into the processing chamber for substrate exchange, and remove the trays from the chamber one at a time. When needed, the method moves one tray into the processing chamber for removal of the susceptor without exposing the chamber to atmospheric environment. | 11-07-2013 |
Patent application number | Description | Published |
20090027063 | Method for Calibrating an Electrostatic Discharge Tester - The present disclosure relates to a method for calibrating transient behaviour of an electrostatic discharge (ESD) test system. The system includes an ESD pulse generator and probe needles for applying a predetermined pulse on a device under test. The probe needles are connected to the ESD pulse generator via conductors. The test system includes measurement equipment for detecting transient behaviour of the device under test by simultaneously capturing voltage and current waveforms the device as a result of the pulse. The method comprises the steps of: (a) applying the ESD test system on a first known system with a first known impedance, (b) applying the ESD test system on a second known system with a known second impedance, and (c) determining calibration data for the transient behaviour the ESD test system on the basis of captured voltage and current waveforms, taking into account said known first and second impedances. In preferred embodiments the waveforms are transferred to the frequency domain for correlation. | 01-29-2009 |
20090073621 | Fast Triggering ESD Protection Device and Method for Designing Same - A method and apparatus for designing an ESD protection circuit comprising a main ESD device and a triggering device connected to a triggering node of the main ESD device by means of which the main ESD device can be triggered for conducting ESD current at a reduced voltage. The triggering device is located in an initial current path for the ESD current. In this initial current path, there is at least one triggering component which can be triggered from an off-state to an on-state. The triggering speed of this component is considered and its design is optimised in view of increasing its triggering speed. Further shown is an ESD protection circuit in which at least one triggering component is selected to be of a predetermined type for achieving a fast triggering speed, preferably of the gated diode type. | 03-19-2009 |
20090280582 | Design Methodology for MuGFET ESD Protection Devices - A method for manufacturing a MuGFET ESD protection device having a given layout by means of a given manufacturing process, the method comprising selecting multiple interdependent layout and process parameters of which a first set are fixed by said manufacturing process and a second set are variable, selecting multiple combinations of possible layout and process parameter values which meet predetermined ESD constraints; determining an optimum value for at least one other parameter in view of a predetermined design target apart from the predetermined ESD constraints; determining values for fin width (W | 11-12-2009 |
20100142105 | Bidirectional ESD Power Clamp - The disclosed method and device relates to a bidirectional ESD power clamp, comprising a semiconductor structure (BigNFET; BigPFET) having a conductive path connected between first and second nodes and having a triggering node via which the conductive path can be triggered. An ESD transient detection circuit is connected between the first and second nodes and to the triggering node and comprises a first part for detecting an occurrence of a first ESD transient on the first node. The semiconductor structure is provided on an insulator substrate, such that a parasitic conductive path between said first and second nodes via the substrate is avoided. The ESD transient detection circuit further comprises a second part for detecting an occurrence of a second ESD transient on the second node. | 06-10-2010 |