| Patent application number | Description | Published |
|---|
| 20090006691 | Bus width arbitration - There is provided a method and apparatus for bus arbitration. One such method includes determining a configuration of a first bond pad, the first bond pad indicating whether a host is configured to communicate with a fixed data storage device or a removable data storage device. If the first bond pad indicates the host is configured to communicate with a fixed data storage device, then the method additionally includes determining the configuration of a second bond pad. The second bond pad indicates the supported bus width of the fixed data storage device. | 01-01-2009 |
| 20090013148 | BLOCK ADDRESSING FOR PARALLEL MEMORY ARRAYS - Apparatus and methods provide associative mapping of the blocks of two or more memory arrays such that data, such as pages of data, from the good blocks of the two or more memory arrays can be read in an alternating manner for speed or can be read in parallel for providing data to relatively wide data channels. This obviates the need for processor intervention to access data and can increase the throughput of data by providing, where configured, the ability to alternate reading of data from two or more arrays. For example, while one array is loading data to a cache, the memory device can be providing data that has already been loaded to the cache. | 01-08-2009 |
| 20090204871 | NON-VOLATILE MEMORY WITH ERROR DETECTION - Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated using parity data or ECC data stored in the memory. Results of the error detection can be accessed by a memory controller for data repair operations by the controller. | 08-13-2009 |
| 20100064089 | BUS WIDTH NEGOTIATION - There is provided a method and apparatus for bus negotiation. One such method includes determining a configuration of a first bond pad, the first bond pad indicating whether a host is configured to communicate with a fixed data storage device or a removable data storage device. If the first bond pad indicates the host is configured to communicate with a fixed data storage device, then the method additionally includes determining the configuration of a second bond pad. The second bond pad indicates the supported bus width of the fixed data storage device. | 03-11-2010 |
| 20100161888 | Data storage system with non-volatile memory using both page write and block program and block erase - An optimized data storage system including non-volatile re-writeable memory having both block program and erase and full or partial page write is disclosed. A memory controller of the system can use block data operations for large data transfers, and page data operations for small data transfers. Page data operations in the non-volatile re-writeable memory do not require block rewrites. One or more layers of the non-volatile re-writeable memory can be fabricated BEOL as two-terminal cross-point memory arrays that are fabricated over a substrate including active circuitry fabricated FEOL. Some or all of the active circuitry can be electrically coupled with the one or more layers of two-terminal cross-point memory arrays to perform data operations on the arrays, such as the block program and block erase and/or full or partial page writes. The arrays can include a plurality of two-terminal memory cells. | 06-24-2010 |
| 20100195393 | Data storage system with refresh in place - A data storage system for refreshing in place data stored in a non-volatile re-writeable memory is disclosed. Data from a location memory can be read into a temporary storage location; the data at the memory location can be erased; the read data error corrected if necessary; and then the read data can be programmed and rewritten back to the same memory location it was read from. One or more layers of the non-volatile re-writeable memory can be fabricated BEOL as two-terminal cross-point memory arrays that are fabricated over a substrate including active circuitry fabricated FEOL. A portion of the active circuitry can be electrically coupled with the one or more layers of two-terminal cross-point memory arrays to perform data operations on the arrays, such as refresh in place operations or a read operation that triggers a refresh in place operation. The arrays can include a plurality of two-terminal memory cells. | 08-05-2010 |
| 20110113163 | BUS WIDTH NEGOTIATION - There is provided a method and apparatus for bus negotiation. One such method includes determining a configuration of a first bond pad, the first bond pad indicating whether a host is configured to communicate with a fixed data storage device or a removable data storage device. If the first bond pad indicates the host is configured to communicate with a fixed data storage device, then the method additionally includes determining the configuration of a second bond pad. The second bond pad indicates the supported bus width of the fixed data storage device. | 05-12-2011 |
| 20110113306 | MEMORY DEVICE WITH ERROR DETECTION - Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated using parity data or ECC data stored in the memory. Results of the error detection can be accessed by a memory controller for data repair operations by the controller. | 05-12-2011 |
