David Dean
David Dean Clinnin, Newburgh, IN US
Patent application number | Description | Published |
---|---|---|
20120257376 | OPTICAL SHEET FOR GRAPHIC IMAGE DISPLAYS - In one embodiment, a graphic image display can comprise: a backlight source; a light transmitting first sheet having a viewing side and a backside, with a plurality of geometric microstructure units on the backside; and a second layer comprising a source of graphic image information. The plurality of geometric microstructure units can be selected from microlenses, polyhedral shapes, lenticular shapes, and combinations comprising at least one of the foregoing. The graphic image display can be suitable for viewing under ambient light from the viewing side alone, under backlighting alone, and in the presence of both ambient light from the viewing side and backlighting. | 10-11-2012 |
20140128543 | METHODS OF MAKING POLYURETHANE COATED ARTICLES, AND ARTICLES MADE THEREFROM - A method of making a polyurethane coating can comprise: mixing an unblocked isocyanate component with a polyol component in the presence of a hydroxyl-free solvent and a catalyst to form a reaction mixture; depositing the reaction mixture onto a polymer substrate; and curing the reaction mixture on the substrate to form a polyurethane coated substrate. The polyurethane coated substrate can have a percent thinning of greater than or equal to 10%, e.g., without cracking or delamination when measured on a rectangular block having 90° angles. | 05-08-2014 |
David Dean Krenbrink, Bridgetown BB
Patent application number | Description | Published |
---|---|---|
20120288917 | ALGAE GROWTH SYSTEM - The invention includes a bioreactor system for growing a photosynthetic culture in an aqueous liquid and harvesting the photosynthetic culture. The present invention further relates to a method for growing a photosynthetic culture in an aqueous liquid and harvesting the photosynthetic culture. The present invention further relates to a use of a harvester system arranged to collect at least part of the scooped photosynthetic culture in a photo bioreactor system. | 11-15-2012 |
David Dean Sanner, Iii, Rochester, MN US
Patent application number | Description | Published |
---|---|---|
20140149727 | SYSTEM AND METHOD FOR INITIALIZING PROCESSOR CORES IN A MULTIPROCESSOR SYSTEM - A system and computer program product for initializing processor cores in a multiprocessor system. The system includes a microcontroller that initializes a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core. | 05-29-2014 |
20140149732 | SYSTEM AND METHOD FOR INITIALIZING PROCESSOR CORES IN A MULTIPROCESSOR SYSTEM - A method for initializing processor cores in a multiprocessor system. The method includes a microcontroller initializing a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core. | 05-29-2014 |
David Dean Schaefer, De Leon Springs, FL US
Patent application number | Description | Published |
---|---|---|
20110274304 | Speaker size adapting method - A method for adapting a small stereo speaker for mounting in a hole designed for a larger speaker (the hole being in a mounting wall). A pair of adapters are provided. These are plates which include an inner perimeter and an outer perimeter. When the two plates are placed together (like book ends) the inner perimeters of the two plates define an opening appropriately sized for the small speaker. The outer perimeters of the two plates include mounting holes and/or slots which are sized and positioned to align with the mounting holes typically used for the larger speaker. | 11-10-2011 |
David Dean Tarby, Chelsea, MI US
Patent application number | Description | Published |
---|---|---|
20120158240 | CONTROLLER AREA NETWORK MESSAGE TRANSMISSION DISABLE TESTING SYSTEMS AND METHODS - An inhibit path diagnostic system includes a first control module. The first control module includes a message output and transmits a first message from the message output to a controller area network (CAN) via a message transmission path. An inhibit path circuit includes the message transmission path. A second control module transmits a disable control signal to the inhibit path circuit to disable the message transmission path. The first control module transmits a second message from the message output subsequent to and based on the transmitting of the disable control signal. At least one of the first control module and the second control module detects a fault of the inhibit path circuit subsequent to the transmitting of the second message and based on a feedback signal from the CAN. | 06-21-2012 |
20120310467 | PROCESSOR SAFETY TEST CONTROL SYSTEMS AND METHODS - First, second, and third processor modules selectively execute a test having N test states while an ignition system of the vehicle is off. N is an integer greater than one. The N test states each include: the first processor module setting a first output to a first predetermined value for one of the N test states; the second processor module setting a second output to a second predetermined value for the one of the N test states; the third processor module setting a third output to a third predetermined value for the one of the N test states; a predetermined expectation for the one of the N test states; and at least one of the first, second, and third processor modules indicating a fault when a fourth output is different than the predetermined expectation. A control module sets the fourth output based on the first, second, and third outputs. | 12-06-2012 |
David Dean Van Dorpe, Burnsville, MN US
Patent application number | Description | Published |
---|---|---|
20130119913 | INTEGRATED DRIVE MOTOR POWER INTERFACE - An integrated drive motor (IDM) power distribution architecture utilizes an IDM power interface module (IPIM) to create a control voltage that is distributed to all the IDMs in a network. This power distribution may be accomplished along a hybrid cable, for example, that includes both signal conductors and power conductors. The IPIM is capable of detecting short circuits and/or overload conditions and disabling the power supply to the IDMs. Additionally, a second power supply may be utilized in the IPIM such that when the power supply to the IDMs is deactivated, the IPIM may remain functional, for example, to report one or more fault conditions to the user. Additionally, this reporting of fault status may be accomplished via a user display integrated with or coupled to the IPIM. | 05-16-2013 |
20150042162 | INTEGRATED DRIVE MOTOR POWER INTERFACE - An integrated drive motor (IDM) power distribution architecture utilizes an IDM power interface module (IPIM) to create a control voltage that is distributed to all the IDMs in a network. This power distribution may be accomplished along a hybrid cable, for example, that includes both signal conductors and power conductors. The IPIM is capable of detecting short circuits and/or overload conditions and disabling the power supply to the IDMs. Additionally, a second power supply may be utilized in the IPIM such that when the power supply to the IDMs is deactivated, the IPIM may remain functional, for example, to report one or more fault conditions to the user. Additionally, this reporting of fault status may be accomplished via a user display integrated with or coupled to the IPIM. | 02-12-2015 |