Patent application number | Description | Published |
20090121774 | MONOLITHIC INTEGRATED CIRCUIT AND USE OF A SEMICONDUCTOR SWITCH - A monolithic integrated circuit is provided that includes a semiconductor switch, a constant current source, a capacitor, and a load circuit, which has a load capacitance. An output of the semiconductor switch is connected to the load circuit to turn on and off a supply voltage of the load circuit. The capacitor is connected to the output of the semiconductor switch and to a control input of the semiconductor switch. The constant current source can be or is connected to the control input of the semiconductor switch. Also, a use of a semiconductor switch is provided to reduce the leakage current of a load circuit of a monolithic integrated circuit. | 05-14-2009 |
20100091923 | CIRCUIT FOR A RADIO SYSTEM, USE AND METHOD FOR OPERATION - A circuit and method of operation for a circuit of a radio system in which a system time is divided into symbols, in which a system clock generator is activated in an operating mode, so that the system time is determined from an output clock signal of the system clock generator by counting, in which the system clock generator is deactivated in a sleep mode, in which an output clock signal of a sleep clock generator is blanked as a function of an output signal of a modulo divider in the sleep mode, and the system time is determined by counting, wherein an output frequency of the output clock signal of the sleep clock generator is a non-integer multiple of a symbol frequency, in which the modulo divider divides the output clock signal of the sleep clock generator by a division factor, and in which the division factor of the modulo divider is produced by changing between at least two integer divisor values. | 04-15-2010 |
20100102632 | CIRCUIT, USE, AND METHOD FOR OPERATING A CIRCUIT - A circuit, use, and method for operating a circuit is provided that includes a regulated first voltage source for providing a supply voltage at an output of the first voltage source for a subcircuit, an adjustable second voltage source for providing an output voltage to supply the subcircuit, and an evaluation circuit, which is connected to an output of the second voltage source and to a control input of the second voltage source and to the output of the first voltage source. Wherein the evaluation circuit is formed to adjust the output voltage of the second voltage source by means of a control signal at the control input of the second voltage source with evaluation of the supply voltage at the output of the first voltage source, and wherein the evaluation circuit and/or the second voltage source have a memory for storing values of the adjustment. | 04-29-2010 |
20100109732 | INTEGRATED CIRCUIT, CONTROL METHOD, AND USE OF A CIRCUIT FOR A SLEEP MODE AND AN OPERATING MODE - A circuit, control method, and use of a circuit for a sleep mode and an operating mode with a digital CMOS circuit with NMOS field-effect transistors and with PMOS field-effect transistors, with a first load device, whereby source terminals of the NMOS field-effect transistors of the digital CMOS circuit are connected via the first load device to a first supply voltage, and with a second load device, whereby source terminals of the PMOS field-effect transistors of the digital CMOS circuit are connected via the second load device to a second supply voltage, wherein the body terminals of the NMOS field-effect transistors of the digital CMOS circuit are connected directly to the first supply voltage, and the body terminals of the PMOS field-effect transistors of the digital CMOS circuit are connected directly to the second supply voltage. | 05-06-2010 |
20100109764 | CIRCUIT, AN ADJUSTING METHOD, AND USE OF A CONTROL LOOP - A circuit, an adjusting method, and use of a control loop for adjusting a data retention voltage and/or a leakage current of a CMOS circuit for a sleep mode, wherein the CMOS circuit is operated to control in a measuring mode, whereby in the measuring mode a leakage current exclusively flows through the CMOS circuit, the control loop in the measuring mode adjusts the data retention voltage and/or the leakage current, and the adjustments of the control loop for the sleep mode are stored. | 05-06-2010 |
20100115297 | CIRCUIT, METHOD FOR OPERATING A CIRCUIT, AND USE - Circuit, method for operating a circuit, and use, having a voltage regulator, which has a regulator output for providing a supply voltage, which for the supply can be connected to at least one first digital subcircuit via a first switch and to a second digital subcircuit via a second switch, wherein the voltage regulator is formed to output a first status signal dependent on the supply voltage, and to turn on the first switch by the first status signal is connected to a first control input of the first switch, and the first switch is formed to output a second status signal dependent on its switching state, and to turn on the second switch by the second status signal is connected to a second control input of the second switch. | 05-06-2010 |
20120293246 | Circuit, An Adjusting Method, and Use of a Control Loop - A circuit, an adjusting method, and use of a control loop for adjusting a data retention voltage and/or a leakage current of a CMOS circuit for a sleep mode, wherein the CMOS circuit is operated to control in a measuring mode, whereby in the measuring mode a leakage current exclusively flows through the CMOS circuit, the control loop in the measuring mode adjusts the data retention voltage and/or the leakage current, and the adjustments of the control loop for the sleep mode are stored. | 11-22-2012 |
20130002019 | Circuit, Method for Operating a Circuit, and Use - Circuit, method for operating a circuit, and use, having a voltage regulator, which has a regulator output for providing a supply voltage, which for the supply can be connected to at least one first digital subcircuit via a first switch and to a second digital subcircuit via a second switch, wherein the voltage regulator is formed to output a first status signal dependent on the supply voltage, and to turn on the first switch by the first status signal is connected to a first control input of the first switch, and the first switch is formed to output a second status signal dependent on its switching state, and to turn on the second switch by the second status signal is connected to a second control input of the second switch. | 01-03-2013 |
20130124587 | Circuit for a Radio System, Use and Method for Operation - A circuit and method of operation for a circuit of a radio system in which a system time is divided into symbols, in which a system clock generator is activated in an operating mode, so that the system time is determined from an output clock signal of the system clock generator by counting, in which the system clock generator is deactivated in a sleep mode, in which an output clock signal of a sleep clock generator is blanked as a function of an output signal of a modulo divider in the sleep mode, and the system time is determined by counting, wherein an output frequency of the output clock signal of the sleep clock generator is a non-integer multiple of a symbol frequency, in which the modulo divider divides the output clock signal of the sleep clock generator by a division factor, and in which the division factor of the modulo divider is produced by changing between at least two integer divisor values. | 05-16-2013 |
20140375130 | Circuit, Use, and Method for Operating a Circuit - A circuit, use, and method for operating a circuit is provided that includes a regulated first voltage source for providing a supply voltage at an output of the first voltage source for a subcircuit, an adjustable second voltage source for providing an output voltage to supply the subcircuit, and an evaluation circuit, which is connected to an output of the second voltage source and to a control input of the second voltage source and to the output of the first voltage source. Wherein the evaluation circuit is formed to adjust the output voltage of the second voltage source by means of a control signal at the control input of the second voltage source with evaluation of the supply voltage at the output of the first voltage source, and wherein the evaluation circuit and/or the second voltage source have a memory for storing values of the adjustment. | 12-25-2014 |