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Das, NC
Andrew A. Das, Raleigh, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20090125524 | Correlation-Based Visualization of Service-Oriented Architecture Protocol (SOAP) Messages - Correlation-based visualization of markup language messages is implemented. According to an embodiment of the present invention, a message manager receives a markup language message exchanged over a network. Correlation logic applies a template to the markup language message. Correlation logic utilizes at least one rule to visually identify correlated message in the markup language message in a tree structure. The message manager outputs the tree structure. | 05-14-2009 |
Mrinal K. Das, Durham, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20080233285 | Methods of forming SIC MOSFETs with high inversion layer mobility - Methods of forming an oxide layer on silicon carbide include thermally growing an oxide layer on a layer of silicon carbide, and annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C. The oxide layer may be annealed in NO in a silicon carbide tube that may be coated with silicon carbide. To form the oxide layer, a preliminary oxide layer may be thermally grown on a silicon carbide layer in dry O | 09-25-2008 |
| 20090004883 | Methods of fabricating oxide layers on silicon carbide layers utilizing atomic oxygen - Methods of forming oxide layers on silicon carbide layers are disclosed, including placing a silicon carbide layer in a chamber such as an oxidation furnace tube that is substantially free of metallic impurities, heating an atmosphere of the chamber to a temperature of about 500° C. to about 1300° C., introducing atomic oxygen in the chamber, and flowing the atomic oxygen over a surface of the silicon carbide layer to thereby form an oxide layer on the silicon carbide layer. In some embodiments, introducing atomic includes oxygen providing a source oxide in the chamber and flowing a mixture of nitrogen and oxygen gas over the source oxide. The source oxide may comprise aluminum oxide or another oxide such as manganese oxide. Some methods include forming an oxide layer on a silicon carbide layer and annealing the oxide layer in an atmosphere including atomic oxygen. | 01-01-2009 |
| 20090261351 | Silicon Carbide Devices Having Smooth Channels - Power devices are provided including a p-type conductivity well region and a buried p | 10-22-2009 |
| 20100009545 | Methods of Fabricating Oxide Layers on Silicon Carbide Layers Utilizing Atomic Oxygen - Methods of forming oxide layers on silicon carbide layers are disclosed, including placing a silicon carbide layer in a chamber such as an oxidation furnace tube that is substantially free of metallic impurities, heating an atmosphere of the chamber to a temperature of about 500° C. to about 1300° C., introducing atomic oxygen in the chamber, and flowing the atomic oxygen over a surface of the silicon carbide layer to thereby form an oxide layer on the silicon carbide layer. In some embodiments, introducing atomic includes oxygen providing a source oxide in the chamber and flowing a mixture of nitrogen and oxygen gas over the source oxide. The source oxide may comprise aluminum oxide or another oxide such as manganese oxide. Some methods include forming an oxide layer on a silicon carbide layer and annealing the oxide layer in an atmosphere including atomic oxygen. | 01-14-2010 |
| 20100221924 | METHODS OF FORMING SIC MOSFETS WITH HIGH INVERSION LAYER MOBILITY - Methods of forming an oxide layer on silicon carbide include thermally growing an oxide layer on a layer of silicon carbide, and annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C. The oxide layer may be annealed in NO in a silicon carbide tube that may be coated with silicon carbide. To form the oxide layer, a preliminary oxide layer may be thermally grown on a silicon carbide layer in dry O | 09-02-2010 |
| 20100320477 | PROCESS FOR PRODUCING SILICON CARBIDE CRYSTALS HAVING INCREASED MINORITY CARRIER LIFETIMES - A process is described for producing silicon carbide crystals having increased minority carrier lifetimes. The process includes the steps of heating and slowly cooling a silicon carbide crystal having a first concentration of minority carrier recombination centers such that the resultant concentration of minority carrier recombination centers is lower than the first concentration. | 12-23-2010 |
Mrinal Kanti Das, Durham, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20080296771 | METHODS OF FABRICATING SILICON CARBIDE POWER DEVICES BY AT LEAST PARTIALLY REMOVING AN N-TYPE SILICON CARBIDE SUBSTRATE, AND SILICON CARBIDE POWER DEVICES SO FABRICATED - A silicon carbide power device is fabricated by forming a p-type silicon carbide epitaxial layer on an n-type silicon carbide substrate, and forming a silicon carbide power device structure on the p-type silicon carbide epitaxial layer. The n-type silicon carbide substrate is at least partially removed, so as to expose the p-type silicon carbide epitaxial layer. An ohmic contact is formed on at least some of the p-type silicon carbide epitaxial layer that is exposed. By at least partially removing the n-type silicon carbide substrate and forming an ohmic contact on the p-type silicon carbide epitaxial layer, the disadvantages of using a p-type substrate may be reduced or eliminated. Related structures are also described. | 12-04-2008 |
| 20110121318 | Silicon Carbide Switching Devices Including P-Type Channels - Methods of forming a p-channel MOS device in silicon carbide include forming an n-type well in a silicon carbide layer, and implanting p-type dopant ions to form a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is formed in the channel region. The implanted ions are annealed in an inert atmosphere at a temperature greater than 1650° C. A gate oxide layer is formed on the channel region, and a gate is formed on the gate oxide layer. A silicon carbide-based transistor includes a silicon carbide layer, an n-type well in the silicon carbide layer, and a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is in the channel region and includes p-type dopants at a dopant concentration of about 1×10 | 05-26-2011 |
Raja Das, Chapel Hill, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20080222651 | MULTIPLE MESSAGE SOURCE ELECTRONIC DATA INTERCHANGE (EDI) ENVELOPER WITH BATCHING SUPPORT - Embodiments of the present invention address deficiencies of the art in respect to EDI enveloping and provide a method, system and computer program product for multiple message source EDI enveloping with batching support. In one embodiment of the invention, a method for multi-format EDI enveloping can include receiving messages from multiple concurrent message sources, transforming the received messages into an EDI format, inserting the transformed messages into a minimal number of envelopes, and forwarding the envelopes as an EDI interchange to designated trading partners. | 09-11-2008 |
Subhendu Das, Durham, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20110131378 | Managing Access to a Cache Memory - Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area. | 06-02-2011 |