| Patent application number | Description | Published |
|---|
| 20080224211 | Monolithic MOSFET and Schottky diode device - A Schottky diode is integrated into a planar or trench topology MOSFET having parallel spaced source regions diffused into spaced base stripes. The diffusions forming the source and base stripes are interrupted to permit the drift region to extend to the top of the die and receive a Schottky barrier metal and the source contact. The MOSFET and Schottky share the same drift region, and the pitch between base and source stripes is not changed to receive the Schottky structure. | 09-18-2008 |
| 20080237632 | III-nitride power semiconductor device - A III-nitride power semiconductor device that includes a first III-nitride power semiconductor device and a second III-nitride power semiconductor device formed in a common semiconductor die and operatively integrated to form a half-bridge. | 10-02-2008 |
| 20090218617 | SUPERJUNCTION POWER SEMICONDUCTOR DEVICE - A superjunction power semiconductor device which includes spaced drift regions each extending from the bottom of a respective gate trench to the substrate of the device. | 09-03-2009 |
| 20100140689 | Trench-Based Power Semiconductor Devices with Increased Breakdown Voltage Characteristics - Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed. | 06-10-2010 |
| 20100155839 | LATERAL MOSFET WITH SUBSTRATE DRAIN CONNECTION - In one form a lateral MOSFET includes an active gate positioned laterally between a source region and a drain region, the drain region extending from an upper surface of a monocrystalline semiconductor body to a bottom surface of the monocrystalline semiconductor body, and a non-active gate positioned above the drain region. In another form the lateral MOSFET includes a gate positioned laterally between a source region and a drain region, the drain region extending from an upper surface of a monocrystalline semiconductor body to a bottom surface of the monocrystalline semiconductor body, the source region and the drain region being of a first conductivity type, a heavy body region of a second conductivity type in contact with and below the source region, and the drain region comprising a lightly doped drain (LDD) region proximate an edge of the gate and a sinker extending from the upper surface of the monocrystalline body to the bottom surface of the monocrystalline semiconductor body. | 06-24-2010 |
| 20100264490 | LDMOS WITH SELF ALIGNED VERTICAL LDD BACKSIDE DRAIN - A field effect transistor includes a semiconductor region of a first conductivity type having an upper surface and a lower surface, the lower surface of the semiconductor region extending over and abutting a substrate. A well regions of a second conductivity type is disposed within the semiconductor region. The field effect transistor also includes source regions of the first conductivity type disposed in the well regions and a gate electrode extending over each well region and overlapping a corresponding one of the source regions. Each gate electrode is insulated from the underlying well region by a gate dielectric. At least one LDD region of the first conductivity type is disposed in the semiconductor region between every two adjacent well regions such that the at least one LDD region is in contact with the two adjacent well regions between which it is disposed. A sinker region is disposed in the semiconductor region directly underneath the at least one LDD region such that the at least one LDD region and the sinker region are positioned along a vertical orientation between the upper and lower surfaces of the semiconductor region. | 10-21-2010 |
| 20110171798 | LDMOS WITH SELF ALIGNED VERTICAL LDD BACKSIDE DRAIN - A field effect transistor includes a semiconductor region of a first conductivity type having an upper surface and a lower surface, the lower surface of the semiconductor region extending over and abutting a substrate. A well regions of a second conductivity type is disposed within the semiconductor region. The field effect transistor also includes source regions of the first conductivity type disposed in the well regions and a gate electrode extending over each well region and overlapping a corresponding one of the source regions. Each gate electrode is insulated from the underlying well region by a gate dielectric. At least one LDD region of the first conductivity type is disposed in the semiconductor region between every two adjacent well regions such that the at least one LDD region is in contact with the two adjacent well regions between which it is disposed. A sinker region is disposed in the semiconductor region directly underneath the at least one LDD region such that the at least one LDD region and the sinker region are positioned along a vertical orientation between the upper and lower surfaces of the semiconductor region. | 07-14-2011 |
| 20120018803 | LATERAL DRAIN MOSFET WITH SUBSTRATE DRAIN CONNECTION - In one form a lateral MOSFET includes an active gate positioned laterally between a source region and a drain region, the drain region extending from an upper surface of a monocrystalline semiconductor body to a bottom surface of the monocrystalline semiconductor body, and a non-active gate positioned above the drain region. In another form the lateral MOSFET includes a gate positioned laterally between a source region and a drain region, the drain region extending from an upper surface of a monocrystalline semiconductor body to a bottom surface of the monocrystalline semiconductor body, the source region and the drain region being of a first conductivity type, a heavy body region of a second conductivity type in contact with and below the source region, and the drain region comprising a lightly doped drain (LDD) region proximate an edge of the gate and a sinker extending from the upper surface of the monocrystalline body to the bottom surface of the monocrystalline semiconductor body. | 01-26-2012 |
