| Patent application number | Description | Published |
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| 20110055455 | INCREMENTAL GARBAGE COLLECTION FOR NON-VOLATILE MEMORIES - Systems and methods are provided for performing incremental garbage collection for non-volatile memories (“NVMs”), such as flash memory. In some embodiments, an electronic device including the NVM may perform incremental garbage collection to free up and erase a programmed block of the NVM. The programmed block may include valid data and invalid data, and the electronic device may be configured to copy the valid data from the programmed block to an erased block in portions. In between programming each portion of the valid data to the erased block, the electronic device can program host data to the erased block. This way, the electronic device can stagger the garbage collection operations and prevent a user from having to experience one long garbage collection operation. | 03-03-2011 |
| 20110072189 | METADATA REDUNDANCY SCHEMES FOR NON-VOLATILE MEMORIES - Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location. | 03-24-2011 |
| 20110173462 | CONTROLLING AND STAGGERING OPERATIONS TO LIMIT CURRENT SPIKES - Systems and methods are disclosed for managing the peak power consumption of a system, such as a non-volatile memory system (e.g., flash memory system). The system can include multiple subsystems and a controller for controlling the subsystems. Each subsystem may have a current profile that is peaky. Thus, the controller may control the peak power of the system by, for example, limiting the number of subsystems that can perform power-intensive operations at the same time or by aiding a subsystem in determining the peak power that the subsystem may consume at any given time. | 07-14-2011 |
| 20110209028 | CODEWORD REMAPPING SCHEMES FOR NON-VOLATILE MEMORIES - Systems and methods are disclosed for remapping codewords for storage in a non-volatile memory, such as flash memory. In some embodiments, a controller that manages the non-volatile memory may prepare codeword using a suitable error correcting code. The controller can store a first portion of the codeword in a lower page of the non-volatile memory may store a second portion of the codeword in an upper page of the non-volatile memory. Because upper and lower pages may have different resiliencies to error-causing phenomena, remapping codewords in this manner may even out the bit error rates of the codewords (which would otherwise have a more bimodal distribution). | 08-25-2011 |
| 20110213945 | DATA PARTITIONING SCHEME FOR NON-VOLATILE MEMORIES - Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data. | 09-01-2011 |
| 20110235434 | SYSTEMS AND METHODS FOR REFRESHING NON-VOLATILE MEMORY - Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. To prevent data errors due to leakage effects, the NVM may be refreshed. For example, a reserved portion of the NVM may be selected, and a predetermined pattern can be stored into the reserved portion. The reserved portion can then be monitored for storage deterioration over time. After determining that storage deterioration of the reserved portion has occurred, the NVM can be refreshed. In some embodiments, a controller can attempt to distinguish data errors due to leakage effects from data errors due to disturb issues. | 09-29-2011 |
| 20110238629 | UNCORRECTABLE ERROR HANDLING SCHEMES FOR NON-VOLATILE MEMORIES - Systems and methods are provided for handling uncorrectable errors in a non-volatile memory (“NVM”), such as flash memory, during a garbage collection operation. | 09-29-2011 |
| 20110238886 | GARBAGE COLLECTION SCHEMES FOR INDEX BLOCK - Systems and methods are provided for handling uncorrectable errors that may occur during garbage collection of an index page or block in non-volatile memory. | 09-29-2011 |
| 20110239064 | MANAGEMENT OF A NON-VOLATILE MEMORY BASED ON TEST QUALITY - Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. The NVM may be managed based on results of a test performed on the NVM. The test may indicate, for example, physical memory locations that may be susceptible to errors, such as certain pages in the blocks of the NVM. Tests on multiple NVMs of the same type may be compiled to create a profile of error tendencies for that type of NVM. In some embodiments, data may be stored in the NVM based on individual test results for the NVM or based on a profile of the NVM type. For example, memory locations susceptible to error may be retired or data stored in those memory locations may be protected by a stronger error correcting code. | 09-29-2011 |
| 20110239065 | RUN-TIME TESTING OF MEMORY LOCATIONS IN A NON-VOLATILE MEMORY - Systems and methods are disclosed for performing run-time tests on a non-volatile memory (“NVM”), such as flash memory. The run-time tests may be tests that are performed on the NVM while the NVM can be operated by an end user (as opposed to during a manufacturing phase). In some embodiments, a controller for the NVM may detect an error event that may be indicative of a systemic failure of a die of the NVM. The controller may then select one or more blocks in the die to test, which may be dies that are currently not being used to store user data. The controller may post process the results of the test to determine whether there is a systemic failure, such as a column failure, and may treat the systemic failure if there is one. | 09-29-2011 |
| 20110239088 | NON-REGULAR PARITY DISTRIBUTION DETECTION VIA METADATA TAG - This can relate to non-regular parity distribution of a non-volatile memory (“NVM”), such as flash memory, and detection of the non-regular parity via a metadata tag. For example, each codeword of the NVM can include one or more parity pages that may be distributed at random through the NVM. To identify the page as a parity page, a parity page marker can be included in the metadata of that page. During power-up of the NVM, an address table including the logical-to-physical address mapping of the pages can be created. Pages including a parity page marker, however, can be skipped during the creation of this address table. Additionally, by having two or more parity pages associated with a codeword, an additional layer of protection can be provided for repairing errors in that codeword. | 09-29-2011 |
