| Patent application number | Description | Published |
| 20080267556 | Flexible Printed Circuits Capable of Transmitting Electrical and Optical Signals - A flexible printed circuit capable of transmitting electrical and optical signals is disclosed. The flexible printed circuit includes a set of optical waveguides for transmitting optical signals and a set of conductors for transmitting electrical signals. Each of a subset of the optical waveguides is enclosed by a respectively one of the conductors. The optical waveguide is made of glass or plastic. The conductors are formed within a first building block constructed by a first dielectric layer and a first substrate layer, and a second building block constructed by a second dielectric layer and a second substrate layer. | 10-30-2008 |
| 20090056998 | METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME - Disclosed herein is a method comprising drilling a first hole in a multilayered device; the multilayered device comprising a fill layer disposed between and in intimate contact with two layers of a first electrically conducting material; the fill layer being electrically insulating; plating the first hole with a slurry; the slurry comprising a magnetic material, an electrically conducting material, or a combination comprising at least one of the foregoing materials; filling the first hole with a fill material; the fill material being electrically insulating; laminating a first layer and a second layer on opposing faces of the multilayered device to form a laminate; the opposing faces being the faces through which the first hole is drilled; the first layer and the second layer each comprising a second electrically conducting material; drilling a second hole through the laminate; the second hole having a circumference that is encompassed by a circumference of the first hole; and plating the surface of the second hole with a third electrically conducting material. | 03-05-2009 |
| 20090188712 | Flexible Multilayer Printed Circuit Assembly with Reduced EMI Emissions - A flexible multilayer printed circuit assembly with shield fences. The flexible multilayer printed circuit assembly with multiple conductive layers includes logic ground vias that connect logic ground plane layers together, and shield vias that connect a top and a bottom shield plane layer together. Each of the shield fences is formed between the shield vias on an outside perimeter of each of the conductive layers. Each of the shield fences contains the logic ground vias inside, and also contains each corresponding conductive layer in the horizontal direction to which each layer extends. | 07-30-2009 |
| 20090277670 | High Density Printed Circuit Board Interconnect and Method of Assembly - A printed circuit board assembly having an edge joined first and second sub-circuit board is provided. The first sub-circuit board includes an edge with a stair-step profile interconnection wherein each of the stairs on the profile exposes an area of a signal layer. Each exposed portion of the signal layer has a plurality of signal pads thereon. The second sub-circuit board includes an edge with an inverse stair-step profile interconnection. A pad-on-pad connector is positioned in-between and electrically interconnects the respective signal layers on each sub-circuit board. | 11-12-2009 |
| 20100084160 | SPLIT FLEX CABLE - A cable assembly for interconnecting a plurality of circuit boards together by using a connector assembly connected to each of the circuit boards. The cable assembly includes a first cable having a first end part and a second cable having a second end part. A first periphery of the first end part has a plurality of first half vias that collectively form a column along a width direction of the connector assembly. A second periphery of the second end part has a plurality of second half vias that collectively form a column along the width direction of the connector assembly. The first and second end parts are coupled together to form a connecting unit, such that the first half vias and the second half vias are joined together to form full vias. | 04-08-2010 |
| Patent application number | Description | Published |
| 20090189635 | METHOD AND APPARATUS FOR IMPLEMENTING REDUCED COUPLING EFFECTS ON SINGLE ENDED CLOCKS - A method and apparatus implement reduced noise coupling effects on single ended clocks, and a design structure on which the subject circuit resides is provided. A clock receiver includes a clock voltage reference that is generated from received clock peaks and valleys of a received input clock signal. The received clock peaks (VT) and the received clock valleys (VB) are continuously sampled. The clock voltage reference is set, for example, equal to an average of VT and VB; or ((VT+VB)/2). | 07-30-2009 |
| 20090211792 | Flexible Printed Circuit Assembly With Reduced Dielectric Loss - A flexible printed circuit assembly with a fluorocarbon dielectric layer and an adhesive layer with reduced thickness. The flexible printed circuit assembly includes a first dielectric layer and a signal trace disposed on the first dielectric layer. An adhesive layer with a thickness smaller than a height of the signal trace is disposed on the first dielectric layer, so that only a portion of a side surface of the signal trace is covered. A second dielectric layer made of fluorocarbon is disposed on the adhesive layer, covering a remaining portion of the side surface of the signal trace and a top surface of the signal trace. | 08-27-2009 |
| 20090255713 | Controlling Impedance and Thickness Variations for Multilayer Electronic Structures - Impedance control, and the uniformity of electrical and mechanical characteristics in electronic packaging are becoming more important as chip and bus speeds increase and manufacturing processes evolve. Current state of the art design and manufacture processes inherently introduce physical dielectric thickness variations into PCB cross sections. These thickness variations between the ground reference plane(s) and the signal layer(s) inject undesirable characteristic impedance variations and undesirable mechanical variations in thickness and surface topology. Therefore a process of generating equalization data and a design structure for multilayer electronic structures is presented. | 10-15-2009 |
| 20090255715 | Controlling Impedance and Thickness Variations for Multilayer Electronic Structures - Impedance control, and the uniformity of electrical and mechanical characteristics in electronic packaging are becoming more important as chip and bus speeds increase and manufacturing processes evolve. Current state of the art design and manufacture processes inherently introduce physical dielectric thickness variations into multilayer cross sections. These thickness variations between the ground reference plane(s) and the signal layer(s) inject undesirable characteristic impedance variations and undesirable mechanical variations in thickness and surface topology. Therefore a multilayer structure and a method of manufacture are presented. | 10-15-2009 |
| 20090258194 | Controlling Impedance and Thickness Variations for Multilayer Electronic Structures - Impedance control, and the uniformity of electrical and mechanical characteristics in electronic packaging are becoming more important as chip and bus speeds increase and manufacturing processes evolve. Current state of the art design and manufacture processes inherently introduce physical dielectric thickness variations into PCB cross sections. These thickness variations between the ground reference plane(s) and the signal layer(s) inject undesirable characteristic impedance variations and undesirable mechanical variations in thickness and surface topology. Therefore a multilayer electronic structure and a method of manufacture is presented. | 10-15-2009 |