Patent application number | Description | Published |
20090247503 | 5-DEMETHOXYFUMAGILLOL AND DERIVATIVES THEREOF - Provided herein are 5-demethoxyfumagillol and its derivatives. Also provided herein are methods of making the 5-demethoxyfumagillol and derivatives. Also provided herein are biological activities of the 5-demethoxyfumagillol and derivatives and methods of using same for treating diseases. | 10-01-2009 |
20090253118 | LUMINESCENCE QUENCHERS AND FLUOROGENIC PROBES FOR DETECTION OF REACTIVE SPECIES - Provided herein are compounds or fluorogenic probes which can be used as reagents for measuring, detecting and/or screening ROS or RNS such as peroxynitrite or hypochlorite. Provided also herein are methods that can be used to measure, directly or indirectly, the amount of peroxynitrite or hypochlorite in chemical samples and biological samples such as cells and tissues in living organisms. Specifically, the methods include the steps of contacting the fluorogenic probes disclosed herein with the samples to form one or more fluorescent compounds, and measuring fluorescence properties of the fluorescent compounds. Provided also herein are high-throughput screening fluorescent methods for detecting or screening peroxynitrite or compounds that can increase or decrease the level of peroxynitrite or hypochlorite in chemical and biological samples. | 10-08-2009 |
20090253143 | FLUOROPHORE COMPOUNDS - Provided herein are fluorophore compounds including rhodol and rhodamine compounds which can be used as fluorescent labels and/or fluorogenic probes and methods of making same. Provided also herein are methods that can be used to track, measure, detect, or screen biological species such as protein, DNA, enzyme, antibody, organelle, cell, tissue, drug, hormone, nucleotide, nucleic acid, polysaccharide or lipid in living organisms. Specifically, the methods include the steps of contacting any of the fluorophore compounds, rhodol compounds and rhodamine compounds disclosed herein with the biological species to form one or more fluorescent compounds, and measuring fluorescence properties of the fluorescent compounds. Provided also herein are high-throughput screening fluorescent methods for detecting or screening biological species. | 10-08-2009 |
20110221018 | Electronic Device Package and Methods of Manufacturing an Electronic Device Package - An electronic device package comprises a substrate | 09-15-2011 |
20120187462 | HIGH OPTICAL EFFICIENCY CMOS IMAGE SENSOR - High optical efficiency CMOS image sensors capable of sustaining pixel sizes less than 1.2 microns are provided. Due to high photodiode fill factors and efficient optical isolation, microlenses are unnecessary. Each sensor includes plural imaging pixels having a photodiode structure on a semiconductor substrate adjacent a light-incident upper surface of the image sensor. An optical isolation grid surrounds each photodiode structure and defines the pixel boundary. The optical isolation grid extends to a depth of at least the thickness of the photodiode structure and prevents incident light from penetrating through the incident pixel to an adjacent pixel. A positive diffusion plug vertically extends through a portion of the photodiode structure. A negative diffusion plug vertically extends into the semiconductor substrate for transferring charge generated in the photodiode to a charge collecting region within the semiconductor substrate. Pixel circuitry positioned beneath the photodiode controls charge transfer to image readout circuitry. | 07-26-2012 |
20130187267 | INCREASED SURFACE AREA ELECTRICAL CONTACTS FOR MICROELECTRONIC PACKAGES - A multilayer microelectronic device package includes one or more vertical electrical contacts. At least one semiconductor material layer is provided having one or more electrical devices fabricated therein. An electrical contact pad can be formed on or in the semiconductor material layer. Another material layer is positioned adjacent to the semiconductor material layer and includes a conductive material stud embedded in or bonded to the layer. A via is formed through at least a portion of the semiconductor material layer and the electrical contact pad and into the adjacent layer conducting material stud. The via is constructed such that the via tip terminates within the conducting material stud, exposing the conducting material. A metallization layer is disposed in the via such that the metallization layer contacts both the electrical contact pad and the conducting material stud exposed by the via tip. | 07-25-2013 |
20130292787 | LOW COST BACKSIDE ILLUMINATED CMOS IMAGE SENSOR PACKAGE WITH HIGH INTEGRATION - This invention discloses a backside illuminated image sensor without the need to involve a mechanical grinding process or a chemical-mechanical planarization process in fabrication, and a fabricating method thereof. In one embodiment, an image sensor comprises a semiconductor substrate, a plurality of light sensing elements in the semiconductor substrate, and a cavity formed in the semiconductor substrate. The light sensing elements are arranged in a substantially planar manner. The cavity has a base surface overlying the light sensing elements. The presence of the cavity allows the image to reach the light sensing elements through the cavity base surface. The cavity can be fabricated by etching the semiconductor substrate. Agitation may also be used when carrying out the etching. | 11-07-2013 |
20140021596 | WAFER-LEVEL DEVICE PACKAGING - The present invention relates to a semiconductor device packaged at the wafer level such that an entire packaged device is formed prior to separation of individual devices. The semiconductor device package includes a semiconductor chip having one or more bonding pads associated with the chip and a protective layer bonded over the semiconductor chip. An insulation layer is positioned on at least side edges and a lower surface of the semiconductor chip. Interconnection/bump metallization is positioned adjacent one or more side edges of the semiconductor chip and is electrically connected to at least one bonding pad. A compact image sensor package can be formed that is vertically integrated with a digital signal processor and memory chip along with lenses and a protective cover. | 01-23-2014 |
20140131882 | THROUGH-SILICON VIA STRUCTURE WITH PATTERNED SURFACE, PATTERNED SIDEWALL AND LOCAL ISOLATION - This invention discloses a through-silicon via (TSV) structure for providing an electrical path between a first-side surface and a second-side surface of a silicon chip, and a method for fabricating the structure. In one embodiment, the TSV structure comprises a via penetrated through the chip from the first-side surface to the second-side surface, providing a first end on the first-side surface and a second end on the second-side surface. A local isolation layer is deposited on the via's sidewall and on a portion of the first-side surface surrounding the first end. The TSV structure further comprises a plurality of substantially closely-packed microstructures arranged to form a substantially non-random pattern and fabricated on at least the portion of the first-side surface covered by the local isolation layer for promoting adhesion of the local isolation layer to the chip. A majority of the microstructures has a depth of at least 1 μm. | 05-15-2014 |
20150016078 | Partitioned Hybrid Substrate for Radio Frequency Applications - The presently claimed invention is to provide a package for compact RF signal system, and a method to form the package thereof in order to miniaturize the size of package, improve signal integrity, and reduce manufacturing cost. The package comprises a hybrid substrate with a sandwiched structure, in which the hybrid substrate comprises an upper layer and a lower layer with different dielectric properties being separated by an interposer for improving electrical isolation and mechanical stiffness. Metal layers are formed on the sidewalls of the opening to surround an active component, such that the metal sidewalls together with two ground plates in the upper and lower layers constitute a self-shielding enclosure inside the package to protect the active component. | 01-15-2015 |