Patent application number | Description | Published |
20090167452 | TRANSMISSION CHARACTERISTIC ADJUSTMENT DEVICE, CIRCUIT SUBSTRATE, AND TRANSMISSION CHARACTERISTIC ADJUSTMENT METHOD - A transmission characteristic adjustment device and the like that can carry out circuit adjustment before an error occurs, and has a transmission characteristic with high reliability without generating an error are provided. | 07-02-2009 |
20090168859 | TRANSMISSION CHARACTERISTIC ADJUSTMENT DEVICE, CIRCUIT BOARD, AND TRANSMISSION CHARACTERISTIC ADJUSTMENT METHOD - A transmission characteristic adjustment device with high reliability in a transmission characteristic that can adjust a circuit before an error occurs and does not generate an error is provided. A transmission characteristic adjustment device that adjusts a transmission characteristic between a transmission element and a receiving element interposing a transmission path, includes: a sight test circuit that is provided on the receiving element side and detects an eye pattern aperture; a margin calculation circuit that calculates a margin with respect to a mask included in the detected eye pattern aperture; a circuit element adjustment circuit that evaluates a setting value of a circuit element of the transmission element or the receiving element having influence on a receiving waveform based on fluctuation of the calculated margin, and changes the setting value of the circuit element of the transmission element or the receiving element based on a result of the evaluation. | 07-02-2009 |
20090294169 | PRINTED CIRCUIT BOARD FABRICATION METHOD, PRINTED CIRCUIT BOARD OBTAINED THEREBY, AND PRINTED CIRCUIT BOARD FABRICATION APPARATUS - A printed circuit board includes a through hole constituted by a hole penetrating through the front and rear surfaces of the printed circuit board. A fabrication method of the printed circuit board, includes applying conductive material plating to the inner wall surface of the hole to form a through hole electrically connecting the front and rear surfaces of the printed circuit board, and removing the conductive material plated on the hole inner wall surface at least at a portion between the front and rear surfaces of the printed circuit board is carried out to thereby fabricate a printed circuit board having a through hole electrically isolates the front surface of the printed circuit board from the rear surface thereof. | 12-03-2009 |
20090299719 | CIRCUIT SIMULATION APPARATUS AND METHOD,MEDIUM CONTAINING CIRCUIT SIMULATION PROGRAM - A circuit simulation apparatus includes a first acquisition unit that acquires information on a jitter transfer function of a jitter pass element with respect to a predetermined frequency band, a second acquisition unit that acquires information pertaining to input jitter to the jitter pass element, a first calculation unit that determines a jitter frequency based on the information acquired by the first acquisition unit or the second acquisition unit to calculate a jitter transfer function value which is a value of the jitter transfer function acquired by the first acquisition unit at the jitter frequency, and a second calculation unit that calculates output jitter from the jitter pass element based on the information pertaining to the input jitter acquired by the second acquisition unit and the jitter transfer function value calculated by the first calculation unit. | 12-03-2009 |
20100030358 | AUTOMATIC WIRING APPARATUS, AUTOMATIC WIRING METHOD, AUTOMATIC WIRING PROGRAM AND COMPUTER-READABLE RECORDING MEDIUM ON WHICH THE PROGRAM IS RECORDED - In order to make it possible to automatically execute a wiring process which satisfies not only a design condition but also design quality relating to an electric characteristic, according to the embodiment, an automatic wiring apparatus includes a design condition changing section for changing a design condition in accordance with priority information regarding the design condition where a wiring process which satisfies the design condition cannot be carried out by a first wiring processing section, a quality allowability decision section for deciding whether or not quality of a wiring region can be allowed where a wiring process which satisfies the design condition after the changing can be executed by a second wiring processing section and an outputting section for outputting a result of the wiring process of the wiring region by the second wiring processing section if it is decided that the quality of the wiring region can be allowed. | 02-04-2010 |
20100054317 | APPARATUS FOR EVALUATING SIGNAL TRANSMISSION SYSTEM, METHOD OF EVALUATING SIGNAL TRANSMISSION SYSTEM, AND STORAGE MEDIUM STORING PROGRAM FOR EVALUATING SIGNAL TRANSMISSION SYSTEM - A signal transmission system evaluation apparatus acquires statistics about a variation in a characteristic value and a limit value of the characteristic value corresponding to a given range of variation, with respect to each of the characteristic values which represent characteristics of the components. The apparatus calculates a probability distribution with respect to each of the characteristic values, based on the statistic acquired, calculates an eye-opening of the signal transmission system in case that the characteristic value is the limit value, makes an adjustment of the limit value. The apparatus calculates a yield rate of the signal transmission system based on the probability distribution and the limit value. | 03-04-2010 |
20100057389 | EVALUATING APPARATUS, A RECORDING MEDIUM STORING AN EVALUATING PROGRAM, AND METHOD FOR DESIGNING SIGNAL TRANSMISSION SYSTEM - A signal transmission evaluating apparatus acquires cross talk ratio and type categorized by a relationship between the first transmission path and the second transmission path for each of the pins of the second transmission path. The apparatus computes an occupation ratio of the crosstalk for each of the types with respect to all of the crosstalk supplied to the first transmission path in the connector, and computes a noise source output in the second transmission path on the basis of the occupation ratio for each of the types of crosstalk. And the apparatus computes first transmission path loss and second transmission path loss on the basis of the occupation ratio for each of the types of crosstalk, and computes an amount of received noise of the first transmission path on the basis of the noise source output and the first transmission path loss and the second transmission path loss. | 03-04-2010 |
20100057423 | SIGNAL TRANSMISSION SYSTEM EVALUATION APPARATUS AND PROGRAM, AND SIGNAL TRANSMISSION SYSTEM DESIGN METHOD - A parameter acquisition section acquires model information about a waveform simulation model of a system of signal transmission, a first parameter of a waveform variation in a time direction in the system, and a second parameter of a waveform variation in an amplitude direction in the system. A first eye pattern calculation section calculates a first eye pattern of the system through a waveform simulation based on the model information acquired by the parameter acquisition section. A second eye pattern calculation section calculates, based on the first and second parameters acquired by the parameter acquisition section, a second eye pattern through processing of the first eye pattern calculated by the first eye pattern calculation section. And a transmission margin calculation section calculates, as a transmission margin, a positional relationship between a specific area and an aperture of the second eye pattern calculated by the second eye pattern calculation section. | 03-04-2010 |
20100080421 | Apparatus and method for eye margin calculating, and computer-readable recording medium recording program therefof - A center location of an eye pattern generated by superimposing waveform signal pieces cut out from a waveform signal generated by a simulator is calculated, and an arrangement of a mask as a quality evaluation criterion of the eye pattern on the center location is envisaged to calculate time coordinate values and voltage coordinate values of feature points included in the mask. First feature points not on a time axis is set as processing objects, and a margin in the voltage axis direction is calculated based on the voltage coordinate values of the first feature points and the voltage coordinate values of waveform signal piece parts associated with the first feature points. Second feature points on the time axis is set as processing objects, and a margin in the time axis direction is calculated based on the time coordinate values of the second feature points and the time coordinate values of waveform signal piece parts associated with the second feature points. | 04-01-2010 |
20100200287 | PRINTED WIRING BOARD, AND DESIGN METHOD FOR PRINTED WIRING BOARD - A multi-layer printed wiring board includes a first insulating layer, a second insulating layer having a dissipation factor higher than a dissipation factor of the first insulating layer, a first conductive layer, and a first via connected to a lead wire in the first conductive layer. The first via includes a stub extending through the second insulating layer. | 08-12-2010 |
20110018548 | PRINTED CIRCUIT BOARD TEST ASSISTING APPARATUS, PRINTED CIRCUIT BOARD TEST ASSISTING METHOD, AND COMPUTER-READABLE INFORMATION RECORDING MEDIUM - A printed circuit board test assisting apparatus includes an input part that has the attribute information of the wiring pattern input thereto; a degradation degree process part that obtains a degradation degree in signal characteristics in a wiring pattern corresponding to attribute information that is input to the input part, based on position information of the wiring pattern corresponding to the attribute information input to the input part, the position information and the size information of the pattern removed area, and the degradation degree information; and an extracting process part that extracts for an actual measurement test a wiring pattern that has a degradation degree equal to or more than a predetermined degree, from wiring patterns for which degradation degrees have been obtained by the degradation degree process part. | 01-27-2011 |
20110022364 | SIMULATION APPARATUS, SIMULATION METHOD, AND SIMULATION PROGRAM - A disclosed device includes a simulation apparatus which simulates a shift in signal characteristics occurring in a wiring pattern formed in a printed wiring board including a first database that stores wiring pattern attribute information and wiring pattern positional information, a second database storing solid lack portion size information and solid lack portion positional information, a third database that stores shift amount information relative to positional relationships between the wiring patterns and the solid lack portions, a shift amount processing unit configured to obtain the shift amount of the signal characteristics in the wiring pattern corresponding to the wiring pattern attribute information which is input based on the wiring pattern positional information corresponding to the wiring pattern attribute information which is input, the solid lack portion positional information, the solid lack portion size information, and the shift amount information. | 01-27-2011 |
20110023005 | WIRING DESIGN ASSISTING APPARATUS, WIRING DESIGN ASSISTING METHOD, AND COMPUTER-READABLE INFORMATION RECORDING MEDIUM - A wiring design assisting apparatus includes an input part that has attribute information of a wiring pattern input thereto; a degradation degree process part that obtains a degradation degree in signal characteristics of a wiring pattern corresponding to attribute information that is input to the input part, based on position information of the wiring pattern corresponding to the attribute information input to the input part, position information and size information of a pattern removed area, and the degradation degree information; and an extracting process part that extracts, for re-wiring, wiring patterns that have degradation degrees equal to or more than a predetermined degree, from wiring patterns for which degradation degrees have been obtained by the degradation degree process part. | 01-27-2011 |
20110246956 | WIRE SPACING VERIFICATION METHOD, WIRE SPACING VERIFICATION APPARATUS, AND COMPUTER-READABLE MEDIUM - A wire-spacing verification method for a computer includes calculating a characteristic impedance of each wire model disposed in a substrate model on a basis of a propagation rate of a signal in the wire model and rise time or fall time of an element model for transmitting the signal, calculating a reference impedance for predetermined sections, creating a distribution map in a direction of a section length with respect to the characteristic impedance of each of the sections for which the reference impedance is calculated, calculating an index indicating a degree of mismatch with the reference impedance, on a basis of the created distribution map, and making an approval/denial determination on the wire model on a basis of the index. | 10-06-2011 |
20110246957 | PIN PLACEMENT DETERMINING METHOD - A pin placement determining method includes calculating a waveform deterioration amount of wires from a noise amount of the wires and wiring loss of the wires, the wires being coupled to a connector on a printed board, comparing the calculated waveform deterioration amount of the wires to an evaluation criteria, evaluating the wires in which the waveform deterioration amount exceeds the evaluation criteria, and replacing corresponding pins of the connectors to which the wires that have been evaluated as exceeding the evaluation criteria are coupled with replacement pins of connectors that have a low noise amount. | 10-06-2011 |