| Patent application number | Description | Published |
|---|
| 20080237793 | Semiconductor device having projection on lower electrode and method for forming the same - A method of forming a semiconductor device, includes forming a lower electrode including a metal and a nitrogen on a semiconductor substrate, irradiating a reducing gas to a surface of the lower electrode, and irradiating a gas containing silicon to the surface of the lower electrode to form a projection containing silicide by reacting the metal with the silicon in an island shape on the surface of the lower electrode. Then, a capacitor film is formed on the lower electrode and the projection, and an upper electrode is formed on the capacitor film. | 10-02-2008 |
| 20080277762 | Semiconductor device including capacitor including upper electrode covered with high density insulation film and production method thereof - A semiconductor device includes a lower electrode provided on a semiconductor substrate, an upper electrode provided on the lower electrode to overlap a part of the lower electrode, a first insulating film provided between the lower electrode and the upper electrode, and a second insulating film provided in contact with an upper part of the upper electrode and on the upper part of the lower electrode, and having a density higher than that of the first insulating film, the second insulating film covering a side surface and a top surface of the upper electrode. | 11-13-2008 |
| 20090184421 | SEMICONDUCTOR DEVICE WITH HIGH RELIABILITY AND MANUFACTURING METHOD THEREOF - A semiconductor device is provided, which includes a substrate, an insulator film formed over the substrate, and plural metal wirings with different widths containing copper as a main component and an impurity which is different from copper. The plural metal wirings includes a first metal wiring having a concentration profile where the concentration of the impurity metal increases from the center part of the stacking direction to the surface and the second metal wiring having a concentration profile where the concentration of the impurity metal decreases from the bottom surface of the stacking direction to the surface. Moreover, the width of the second metal wiring may be larger than the width of the first metal wiring. | 07-23-2009 |
| 20090294980 | SEMICONDUCTOR DEVICE HAVING WIRING LAYER - Provided is a semiconductor device having a wiring layer formed of damascene wiring. The semiconductor device includes: a first wiring having a width equal to or larger than 0.5 μm; a second wiring adjacent to the first wiring and arranged with a space less than 0.5 μm from the first wiring; and a third wiring adjacent to the second wiring and arranged with a space equal to or smaller than 0.5 μm from the first wiring. In the semiconductor device, the second wiring and the third wiring are structured to have the same electric potential. | 12-03-2009 |
| 20090305496 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided. | 12-10-2009 |
| 20100117191 | SEMICONDUCTOR DEVICE - The present invention provides a semiconductor device that shows excellent manufacturing stability and has lower contact resistance, and a method for manufacturing the semiconductor device. | 05-13-2010 |
| 20110230051 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is provided. | 09-22-2011 |
| 20110318900 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device including: a substrate; an insulating film formed over the substrate; a copper interconnect, having a plurality of hillocks formed over the surface thereof, buried in the insulating film; a first insulating interlayer formed over the insulating film and the copper interconnect; a second insulating interlayer formed over the first insulating interlayer; and an electroconductive layer formed over the second insulating interlayer, wherein the top surface of at least one hillock highest of all hillocks is brought into contact with the lower surface of the second insulating interlayer is provided. | 12-29-2011 |
